FreeCalypso > hg > fc-magnetite
view cdg211/cdginc/p_dti.h @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Sun, 19 Jan 2020 01:41:35 +0000 |
| parents | 56abf6cf8a0b |
| children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_dti.h | | SOURCE : "__out__\g23m_dfile\prim\dti.pdf" | | LastModified : "2000-06-29" | | IdAndVersion : "8411.110.00.007" | | SrcFileTime : "Mon Nov 24 15:50:28 2003" | | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:15 2007 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_DTI_H #define P_DTI_H #define CDG_ENTER__P_DTI_H #define CDG_ENTER__FILENAME _P_DTI_H #define CDG_ENTER__P_DTI_H__FILE_TYPE CDGINC #define CDG_ENTER__P_DTI_H__LAST_MODIFIED _2000_06_29 #define CDG_ENTER__P_DTI_H__ID_AND_VERSION _8411_110_00_007 #define CDG_ENTER__P_DTI_H__SRC_FILE_TIME _Mon_Nov_24_15_50_28_2003 #include "CDG_ENTER.h" #undef CDG_ENTER__P_DTI_H #undef CDG_ENTER__FILENAME #include "p_dti.val" /* * End of substructure section, begin of primitive definition section */ #ifndef __T_DTI_READY_IND__ #define __T_DTI_READY_IND__ /* * * CCDGEN:WriteStruct_Count==1022 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 op_ack; /*< 3: 1> operation mode */ } T_DTI_READY_IND; #endif #ifndef __T_DTI_GETDATA_REQ__ #define __T_DTI_GETDATA_REQ__ /* * * CCDGEN:WriteStruct_Count==1023 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 op_ack; /*< 3: 1> operation mode */ } T_DTI_GETDATA_REQ; #endif #ifndef __T_DTI_DATA_REQ__ #define __T_DTI_DATA_REQ__ /* * * CCDGEN:WriteStruct_Count==1024 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_desc_list desc_list; /*< 12: ? > list of generic data descriptors */ } T_DTI_DATA_REQ; #endif #ifndef __T_DTI_DATA_IND__ #define __T_DTI_DATA_IND__ /* * * CCDGEN:WriteStruct_Count==1025 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_desc_list desc_list; /*< 12: ? > list of generic data descriptors */ } T_DTI_DATA_IND; #endif #ifndef __T_DTI_DATA_TEST_REQ__ #define __T_DTI_DATA_TEST_REQ__ /* * * CCDGEN:WriteStruct_Count==1026 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_sdu sdu; /*< 12: ? > test data */ } T_DTI_DATA_TEST_REQ; #endif #ifndef __T_DTI_DATA_TEST_IND__ #define __T_DTI_DATA_TEST_IND__ /* * * CCDGEN:WriteStruct_Count==1027 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_sdu sdu; /*< 12: ? > test data */ } T_DTI_DATA_TEST_IND; #endif #ifndef __T_DTI_DUMMY_REQ__ #define __T_DTI_DUMMY_REQ__ /* * * CCDGEN:WriteStruct_Count==1028 */ typedef struct { T_desc desc; /*< 0: ? > generic data descriptor */ } T_DTI_DUMMY_REQ; #endif #include "CDG_LEAVE.h" #endif