FreeCalypso > hg > fc-magnetite
view cdg211/cdginc/pdeps.cdg @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | 56abf6cf8a0b |
children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : pdeps.cdg | | SOURCE : "__out__\g23m_dfile\prim\aci.pdf" | | LastModified : "2004-06-01" | | IdAndVersion : "8411.105.00.205" | | SrcFileTime : "Mon Jun 7 15:08:48 2004" | | Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ #__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_147_l1_include.pdf #__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_152_ps_include.pdf #__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_153_cause_include.pdf __out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf __out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf __out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mac.pdf __out__\g23m_dfile\prim\mnsms.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_sms.mdf __out__\g23m_dfile\prim\ph.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf