FreeCalypso > hg > fc-magnetite
view cdg3/cdginc-locosto/m_tst.val @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | c15047b3d00d |
children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : m_tst.val | | SOURCE : "msg\tst.mdf" | | LastModified : "2000-10-23" | | IdAndVersion : "8441.603.99.005" | | SrcFileTime : "Wed Nov 28 10:21:30 2007" | | Generated by CCDGEN_2.5.5A on Thu Sep 25 09:18:52 2014 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef M_TST_VAL #define M_TST_VAL #define CDG_ENTER__M_TST_VAL #define CDG_ENTER__FILENAME _M_TST_VAL #define CDG_ENTER__M_TST_VAL__FILE_TYPE CDGINC #define CDG_ENTER__M_TST_VAL__LAST_MODIFIED _2000_10_23 #define CDG_ENTER__M_TST_VAL__ID_AND_VERSION _8441_603_99_005 #define CDG_ENTER__M_TST_VAL__SRC_FILE_TIME _Wed_Nov_28_10_21_30_2007 #include "CDG_ENTER.h" #undef CDG_ENTER__M_TST_VAL #undef CDG_ENTER__FILENAME /* * Value constants for VAL_no_of_pdus */ #define VAL_NO_OF_PDUS___DEF (0x0) /* Number of PDUs to transmit */ #define TEST_INFINITIVE_NO (0x0) /* ciphering not used */ /* * Value constants for VAL_dl_timeslot_offset */ #define TEST_TN0 (0x0) /* downlink timeslot offsett 0 */ #define TEST_TN1 (0x1) /* downlink timeslot offsett 1 */ #define TEST_TN2 (0x2) /* downlink timeslot offsett 2 */ #define TEST_TN3 (0x3) /* downlink timeslot offsett 3 */ #define TEST_TN4 (0x4) /* downlink timeslot offsett 4 */ #define TEST_TN5 (0x5) /* downlink timeslot offsett 5 */ #define TEST_TN6 (0x6) /* downlink timeslot offsett 6 */ #define TEST_TN7 (0x7) /* downlink timeslot offsett 7 */ /* * Value constants for VAL_mode_flag_val */ #define TEST_RANDOM (0x0) /* pseudorandom data */ #define TEST_LOOP (0x1) /* loop back */ /* * user defined constants */ #define L3MAX (0xfb) #define MAX_N_PDU_NUMBER_LIST (0xb) #include "CDG_LEAVE.h" #endif