FreeCalypso > hg > fc-magnetite
view cfg-headers/gprs/swconfig.cfg @ 635:baa0a02bc676
niq32.c DTR handling restored for targets that have it
TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample
and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a
fixed pull-down resistor on this GPIO line), and the code in niq32.c called
UAF_DTRInterruptHandler() (implemented in uartfax.c) from the
IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official
fw this GPIO is a floating input, all of the DTR handling code in uartfax.c
including the interrupt logic is still there, but the hobbled TCS211-20070608
semi-src delivery which OM got from TI contained a change in niq32.c (which
had been kept in FC until now) that removed the call to
UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test"
hacks.
The present change fixes this bug at a long last: if we are building fw for a
target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and
gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c,
whereas if we are building fw for a target that does not use this classic GPIO
arrangement, the code in niq32.c goes back to what we got from OM and all
DTR & DCD code in uartfax.c is conditioned out. This change also removes the
very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 19 Jan 2020 01:41:35 +0000 |
parents | fd8227e3047d |
children |
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#ifndef __SWCONFIG_CFG__ #define __SWCONFIG_CFG__ #define ALR 1 #define BT 0 #define DP 0 #define DWNLD 1 #define GSMLITE 0 #define L1_DYN_DSP_DWNLD 1 #define LONG_JUMP 3 #define MOVE_IN_INTERNAL_RAM 1 #define OP_WCP 0 #define PMODE 2 #define RVDATA_INTERNALRAM 0 #define SRVC 1 #define TR_BAUD_CONFIG TR_BAUD_115200 #define WCP_PROF 0 #endif /* __SWCONFIG_CFG__ */