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view components/drivers_flash @ 635:baa0a02bc676

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niq32.c DTR handling restored for targets that have it TI's original TCS211 fw treated GPIO 3 as the DTR input (wired so on C-Sample and D-Sample boards, also compatible with Leonardo and FCDEV3B which have a fixed pull-down resistor on this GPIO line), and the code in niq32.c called UAF_DTRInterruptHandler() (implemented in uartfax.c) from the IQ_KeypadGPIOHandler() function. But on Openmoko's GTA02 with their official fw this GPIO is a floating input, all of the DTR handling code in uartfax.c including the interrupt logic is still there, but the hobbled TCS211-20070608 semi-src delivery which OM got from TI contained a change in niq32.c (which had been kept in FC until now) that removed the call to UAF_DTRInterruptHandler() as part of those not-quite-understood "CC test" hacks. The present change fixes this bug at a long last: if we are building fw for a target that has TI's "classic" DTR & DCD GPIO arrangement (dsample, fcmodem and gtm900), we bring back all of TI's original code in both uartfax.c and niq32.c, whereas if we are building fw for a target that does not use this classic GPIO arrangement, the code in niq32.c goes back to what we got from OM and all DTR & DCD code in uartfax.c is conditioned out. This change also removes the very last remaining bit of "CC test" bogosity from our FreeCalypso code base.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 19 Jan 2020 01:41:35 +0000
parents 0cbe7438f974
children
line wrap: on
line source

# Building drivers_flash.lib

CFLAGS="-me -pw2 -mn -x -mt -o2 -mw"
CPPFLAGS="-DTOOL_CHOICE=0 -D_TMS470 -DMMI=$MMI"

# Includes

CPPFLAGS="$CPPFLAGS -I../config"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/os/nucleus"
CPPFLAGS="$CPPFLAGS -I.."
CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame/cust_os"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"

SRCDIR=$SRC/cs/drivers/drv_core

# 1st set of source modules

cfile_plain $SRCDIR/dsp_dwnld/leadapi.c
cfile_plain $SRCDIR/inth/niq.c
cfile_plain $SRCDIR/uart/uart.c
cfile_plain $SRCDIR/inth/inth.c
cfile_plain $SRCDIR/timer/timer.c
cfile_plain $SRCDIR/timer/timer1.c
cfile_plain $SRCDIR/timer/timer2.c
cfile_plain $SRCDIR/timer/timer_sec.c
cfile_plain $SRCDIR/security/certificate.c
cfile_plain $SRCDIR/clkm/clkm.c
cfile_plain $SRCDIR/armio/armio.c

# 2nd set of source modules

CFLAGS="-me -pw2 -mn -mt"

cfile_plain $SRCDIR/spi/spi_drv.c
cfile_plain $SRCDIR/abb/abb.c
cfile_plain $SRCDIR/abb/abb_core_inth.c

# niq32

CFLAGS="-me -pw2 -x -o -mw"

cfile_plain $SRCDIR/inth/niq32.c