FreeCalypso > hg > fc-magnetite
view components/frame_na7_db_ir-full @ 680:ee3ac8c617cb
armio.c: set GPIO2 output high initially
On TI-canonical platforms GPIO2 is DCD modem control output. In TI's
original code the AI_InitIOConfig() function called from Init_Target()
would configure GPIO2 as an output and set the initial output value to
low, but then the init code in uartfax.c called from Init_Serial_Flows()
would immediately change it to high, corresponding to DCD not asserted.
The result is a momentary asserted-state glitch on the DCD output.
The present change eliminates this glitch, setting DCD output to
not-asserted initially like it should be.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Thu, 25 Jun 2020 03:17:43 +0000 |
parents | 41b6a18ffa0b |
children |
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# Building frame_na7_db_ir.lib using the GPF source bits we got with TCS3.2 # This version rebuilds the OSL part from our reconstructed source CFLAGS="-mw -x -pw2 -o3 -me -mt -g -mn" # Defines CPPFLAGS="-DNU_DEBUG -D_FF_RV_EXIST_ -DRUN_INT_RAM" CPPFLAGS="$CPPFLAGS -D_TARGET_ -D_NUCLEUS_" # Includes CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/frame" CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc" CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc/nuc/arm7" CPPFLAGS="$CPPFLAGS -I$SRC/$GPF/inc" CPPFLAGS="$CPPFLAGS -I$SRC/gpf2/tst" # Source modules SRCDIR=$SRC/gpf3/frame cfile_symlink $SRCDIR/frame.c cfile_symlink $SRCDIR/vsi_sem.c cfile_symlink $SRCDIR/vsi_com.c cfile_symlink $SRCDIR/vsi_mem.c cfile_symlink $SRCDIR/vsi_tim.c cfile_symlink $SRCDIR/vsi_mis.c cfile_symlink $SRCDIR/vsi_drv.c cfile_symlink $SRCDIR/vsi_trc.c cfile_symlink $SRCDIR/vsi_pro.c cfile_symlink $SRCDIR/xalert.c cfile_symlink $SRCDIR/route.c cfile_symlink $SRCDIR/prf_func.c cfile_symlink $SRCDIR/frm_ext.c cfile_symlink $SRCDIR/frame_version.c # OSL # drop -o3 CFLAGS="-mw -x -pw2 -o -me -mt -g -mn" SRCDIR=$SRC/gpf2/osl cfile_plain $SRCDIR/os_com_ir.c cfile_plain $SRCDIR/os_mem_ir.c cfile_plain $SRCDIR/os_mis_ir.c cfile_plain $SRCDIR/os_pro_ir.c cfile_plain $SRCDIR/os_sem_ir.c cfile_plain $SRCDIR/os_tim_ir.c