view cdg211/cdginc/pdeps.cdg @ 702:9394305d4ff5 default tip

etm_audio.c: fix off-by-one error in auw of FIR coefficients This fix was already made in FC Tourmaline a while back, but it is also the kind of bugfix that deserves to be backported to Magnetite and Selenite as well.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 31 Oct 2022 00:14:44 +0000
parents 56abf6cf8a0b
children
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/*
+--------------------------------------------------------------------------+
| PROJECT : PROTOCOL STACK                                                 |
| FILE    : pdeps.cdg                                                      |
| SOURCE  : "__out__\g23m_dfile\prim\aci.pdf"                              |
| LastModified : "2004-06-01"                                              |
| IdAndVersion : "8411.105.00.205"                                         |
| SrcFileTime  : "Mon Jun 7 15:08:48 2004"                                 |
| Generated by CCDGEN_2.5.5 on Fri Jun 08 13:59:14 2007                    |
|           !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!!                |
+--------------------------------------------------------------------------+
*/

#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_147_l1_include.pdf
#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_152_ps_include.pdf
#__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_8010_153_cause_include.pdf
__out__\g23m_dfile\prim\dl.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf
__out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf
__out__\g23m_dfile\prim\l1test.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mac.pdf
__out__\g23m_dfile\prim\mnsms.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\m_sms.mdf
__out__\g23m_dfile\prim\ph.h: __out__\gsm_ac_gp_fd_pu_em_cph_ds_vc_cal35_ri_36_amd8_ts0\cdginc\p_mphc.pdf