FreeCalypso > hg > fc-magnetite
changeset 395:11e279107681
Magnetite fw can now be compiled to target Calypso C05 (F741979B) silicon
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Thu, 18 Jan 2018 00:03:48 +0000 |
| parents | fe200bd2f188 |
| children | 525d9f565947 |
| files | components/l1_ext src/cs/layer1/audio_cfile/l1audio_sync.c src/cs/layer1/cfile/l1_init.c src/cs/layer1/dsp1/patch_file33_8.c |
| diffstat | 4 files changed, 3229 insertions(+), 20 deletions(-) [+] |
line wrap: on
line diff
--- a/components/l1_ext Wed Jan 17 22:53:14 2018 +0000 +++ b/components/l1_ext Thu Jan 18 00:03:48 2018 +0000 @@ -88,19 +88,25 @@ #cfile_plain $SRCDIR/gtt_cfile/ctm/fifo.c #cfile_plain $SRCDIR/gtt_cfile/ctm/init_interleaver.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_afunc.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_async.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_init.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_sync.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_apihisr.c -cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_func.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/tty_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_mms_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_sch_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/e2_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/speech_acoustic_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/Dyn_dwnld/gprs_patch_file36_10.c -cfile_plain $SRCDIR/dsp1/patch_file36_10_dyn_dwl.c +if [ "$L1_DYN_DSP_DWNLD" = 1 ] +then + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_afunc.c + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_async.c + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_init.c + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_sync.c + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_apihisr.c + cfile_plain $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_func.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/tty_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_mms_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/amr_sch_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/e2_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/speech_acoustic_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/Dyn_dwnld/gprs_patch_file36_10.c + cfile_plain $SRCDIR/dsp1/patch_file36_10_dyn_dwl.c +else + cfile_plain $SRCDIR/dsp1/patch_file${DSP}_${CHIPSET}.c +fi + cfile_plain $SRCDIR/dsp1/leadboot.c if [ "$GPRS" = 1 ]
--- a/src/cs/layer1/audio_cfile/l1audio_sync.c Wed Jan 17 22:53:14 2018 +0000 +++ b/src/cs/layer1/audio_cfile/l1audio_sync.c Thu Jan 18 00:03:48 2018 +0000 @@ -387,7 +387,9 @@ #if (MELODY_E1) /* FreeCalypso: reconstructed from TCS211 object */ + #if (MELODY_E2) if (l1s.melody_e2.dsp_task == FALSE) { + #endif // the melody0 task is activated? if ((l1a_l1s_com.melody0_task.command.start) || (l1s.audio_state[L1S_MELODY0_STATE] != 0)) @@ -402,8 +404,10 @@ l1s_melody1_manager(); l1_audio_it_com = TRUE; } + #if (MELODY_E2) } #endif + #endif #if (VOICE_MEMO) // the voicememo playing task is activated? if ((l1a_l1s_com.voicememo_task.play.command.start) ||
--- a/src/cs/layer1/cfile/l1_init.c Wed Jan 17 22:53:14 2018 +0000 +++ b/src/cs/layer1/cfile/l1_init.c Thu Jan 18 00:03:48 2018 +0000 @@ -515,13 +515,15 @@ l1s_dsp_com.dsp_ndb_ptr->a_d_macc_thr_ahs[5]=1500; #endif - // init of of the threshold for USF detection - #if 1 /* match TCS211 object */ - l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2140; - #elif (L1_FALSE_USF_DETECTION == 1) - l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2300; - #else - l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 0; + #if (DSP >= 34) + // init of of the threshold for USF detection + #if 1 /* match TCS211 object */ + l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2140; + #elif (L1_FALSE_USF_DETECTION == 1) + l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 2300; + #else + l1s_dsp_com.dsp_ndb_ptr->d_thr_usf_detect = 0; + #endif #endif #if (CHIPSET == 12) || (CHIPSET == 15)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cs/layer1/dsp1/patch_file33_8.c Thu Jan 18 00:03:48 2018 +0000 @@ -0,0 +1,3197 @@ +/* + * DSP patch code for Calypso C05 silicon - F741979B. + * + * The 3 versions of the DSP patch for this silicon version with DSP ROM 3311 + * come from the TSM30 source; the present C file is based on TSM30's + * Dsp_patch.c, massaged appropriately to build as if it were patch_file33_8.c + * from TCS211. The selection of which of the 3 available DSP patch versions + * is to be used is made further below. + */ + +// Defintions of available patches +//-------------------------------- +// Samson/Calypso patches for ROM code 3311 +//#define DSP_PATCH_2010 2 // commented out patches can be found in previous +//#define DSP_PATCH_2030 4 // versions of dsp_patch.c with PVCS SBO 06.12.2002 +//#define DSP_PATCH_2040 5 +//#define DSP_PATCH_2070 6 +//#define DSP_PATCH_2090 7 +//#define DSP_PATCH_20A4 8 // non official +//#define DSP_PATCH_20A3 9 +//#define DSP_PATCH_20D0 10 +//#define DSP_PATCH_20D9 11// non official +#define DSP_PATCH_3311_20F0 12 +#define DSP_PATCH_3311_20F3 13// non official +#define DSP_PATCH_3311_2140 14 + +/* let's try using the newest available version */ +#define DSP_PATCH DSP_PATCH_3311_2140 + +#if ((DSP_PATCH == DSP_PATCH_3311_20F0)) + +/*-------------------------------------------------------------------------- +Patch 0x20F0: +============= + +A minor modification is done into the DSP patch compared to the 0x20E0. +=> BUG02394 "CNTR GSM > RXPWM results badly reported into the API" + +This patch is applied on DSP code 33 (Calypso G2 and Samson) + Version: 0x20F0 + Checksum: 0xF49F (with Calypso G2) + +-----------------------------------------------------------------------------*/ + + +const unsigned char patch_array[] = { + +/* Tag */ 0x00, 0x00, 0x00, 0x00, +/* Vers */ 0x03, 0x00, 0x00, 0x00, + +/* size */ 0x1f, 0x04, 0x00, 0x00, +/* addr */ 0x5c, 0x01, 0x00, 0x00, + +0xF8,0x76,0x36,0x0C,0x61,0x01,0x73,0xF0,0x60,0xB3,0xF8,0x76,0xDB,0x08,0xF0,0x20, +0xF8,0x76,0x6B,0x3F,0x38,0x5F,0xF8,0x76,0xDF,0x3F,0xC8,0x5A,0xF8,0x76,0xE0,0x3F, +0xC7,0x5E,0xF8,0x76,0x6A,0x3F,0xE4,0x61,0xF8,0x76,0xE2,0x08,0x00,0x00,0x74,0xF0, +0xCD,0x63,0xF8,0x76,0xE3,0x08,0x0F,0x00,0xF8,0x76,0xE4,0x08,0x00,0x00,0xF8,0x76, +0xCE,0x3F,0x5A,0x04,0xF8,0x76,0xD4,0x3F,0xCA,0x06,0xF8,0x10,0x5A,0x04,0xF8,0x80, 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+0x32,0x00,0xF8,0x76,0x2B,0x0C,0x00,0x10,0xF8,0x76,0x2C,0x0C,0x00,0x10,0xF8,0x76, +0x25,0x0C,0x00,0x00,0x00,0xFC,0x95,0xF4, +/* Final record */ +/* size */ 0x00, 0x00, 0x00, 0x00, +/* addr */ 0x5c, 0x01, 0x00, 0x00, + +}; + +#elif ((DSP_PATCH == DSP_PATCH_3311_20F3)) + +/*-------------------------------------------------------------------------- +Debug patch 0x20F3: +================== +Checksum: 0x7E7D (patch only) / 0x35B1 (Calypso G2) +Diff since 0x20F0: +- BUG02406 "CNTR GPRS > Fixed allocation 4Tx crash". +Layer-1 mandatory modifications to support all fixed allocations up to 4Tx: +- BUG02348 "The MCU does not program the DSP correctly for multi-slot TX ramps" +- BUG02426 "L1 does not handle MSLOT setting correctly in case of |TX| |TX|TX|" +-----------------------------------------------------------------------------*/ + + +const unsigned char patch_array[] = { + +/* Tag */ 0x00, 0x00, 0x00, 0x00, +/* Vers */ 0x03, 0x00, 0x00, 0x00, + +/* size */ 0x56, 0x04, 0x00, 0x00, +/* addr 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+/*-------------------------------------------------------------------------- +Date: 26-Nov-2002 +Patch number: 2140 +Based on DSP patch number: 2130 +Applies to DSP ROM code: 3311, this patch is also compatible with DSP rom code 3416-F751774. +Memory: +Patch size: 8148 words (+43) +Free RAM after patch: 416 words (including SR/TIDE 0x10BE area) +Area used by patch: 0x015C -> 0x07C1 (code), 0x07ED -> 0x07FF (code), 0x5AC8 -> 0x6F7D (code), +0x5879 -> 0x5920 (code), 0x5866 -> 0x5872 (data), 0x10BE -> 0x14BA (code) +API mapping: Refer to CAL822 version 1.11 +Differences between 3311-2140 vs 3311-2130: +-BUG02670 "CNTR > Click before tones in GPRS mode" +-BUG02667 "CNTR > missing initialization of SPENH noise" +-BUG02406 "CNTR GPRS > Fixed allocation 4Tx crash" +-REQ02680 "PATCH > Too many warnings at patch compilation" +Checksums: +-Patch alone 2140: 0x6E0B +-Calypso HERCROM400G2 Rev A/B - DSP code 3311 (0xB734): 0x253F +-Calypso HERCROM400G2 F751774 - DSP code 3416 (0x8D63): 0xFB6E +-----------------------------------------------------------------------------*/ + + +const unsigned char patch_array[] = { + +/* Tag */ 0x00, 0x00, 0x00, 0x00, +/* Vers */ 0x03, 0x00, 0x00, 0x00, + +/* size */ 0x66, 0x06, 0x00, 0x00, +/* addr */ 0x5c, 0x01, 0x00, 0x00, + +0xF8,0x76,0x36,0x0C,0x61,0x01,0x73,0xF0,0x60,0xB3,0xF8,0x76,0xDB,0x08,0x40,0x21, +0xF8,0x76,0x6B,0x3F,0x6B,0x5F,0xF8,0x76,0xDF,0x3F,0xC8,0x5A,0xF8,0x76,0xE0,0x3F, +0xF2,0x5E,0xF8,0x76,0x6A,0x3F,0xEA,0x60,0xF8,0x76,0xE2,0x08,0x00,0x00,0x74,0xF0, +0xFE,0x63,0xF8,0x76,0xE3,0x08,0x0F,0x00,0xF8,0x76,0xE4,0x08,0x00,0x00,0xF8,0x76, +0xCE,0x3F,0x0E,0x04,0xF8,0x76,0xD4,0x3F,0x2F,0x06,0xF8,0x10,0x0E,0x04,0xF8,0x80, +0xD3,0x00,0x74,0xF0,0xC3,0x05,0xF8,0x76,0x41,0x09,0x02,0x00,0xF8,0x76,0xD5,0x08, +0x00,0x00,0xF8,0x76,0x66,0x3F,0x7F,0x06,0x00,0xE8,0x74,0xF0,0x18,0x64,0xF8,0x61, +0x38,0x0C,0x0C,0x00,0x20,0xF8,0x9B,0x01,0xF8,0x76,0x67,0x3F,0x41,0x06,0x00,0xE8, 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+0xC0,0x3D,0x02,0x00,0xF8,0x76,0xC1,0x3D,0xCE,0x0C,0x74,0xF0,0xB6,0x07,0x73,0xF0, +0x61,0xB2,0x24,0xE8,0xF8,0x11,0x64,0x3F,0xE3,0xF5,0x80,0xF9,0xAA,0x86,0xF8,0x61, +0x6F,0x58,0x01,0x00,0x20,0xFC,0xF8,0x76,0xAA,0x3F,0x00,0x00,0xF8,0x68,0x6F,0x58, +0xFE,0xFF,0x00,0xFC,0x36,0xE8,0xF8,0x11,0x64,0x3F,0xE3,0xF5,0x80,0xF9,0xF3,0x07, +0x34,0xE8,0xF8,0x11,0x64,0x3F,0xE3,0xF5,0x00,0xFC,0x95,0xF4, + +/* size */ 0x13, 0x00, 0x00, 0x00, +/* addr */ 0xed, 0x07, 0x00, 0x00, + +0x74,0xF0,0xB8,0x62,0xE4,0xF4,0x74,0xF0,0x58,0x63,0xE4,0xF4,0x74,0xF0,0xBE,0x10, +0xE4,0xF4,0x95,0xF4,0x95,0xF4,0x95,0xF4,0x95,0xF4,0x95,0xF4,0x95,0xF4,0x95,0xF4, +0x95,0xF4,0x95,0xF4,0x95,0xF4, + +/* size */ 0xfd, 0x03, 0x00, 0x00, +/* addr */ 0xbe, 0x10, 0x00, 0x00, + +0xF8,0x10,0xC0,0x3D,0x30,0xF0,0x0F,0x00,0x45,0xFE,0x00,0xED,0x54,0xEA,0x1A,0x76, +0x85,0x12,0x1B,0x76,0xCF,0x11,0x1C,0x76,0xA6,0x13,0x1D,0x76,0xC5,0x13,0x1E,0x76, +0x84,0x14,0xBD,0xF6,0xBD,0xF7,0xB8,0xF7,0xB7,0xF6,0xB9,0xF6,0xB6,0xF7,0xBE,0xF6, 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+0x00,0x00,0x17,0x80,0x00,0x09,0x0C,0x09,0x10,0xF2,0x08,0x00,0x46,0xF8,0xA3,0x14, +0x17,0x10,0x01,0x08,0x17,0x80,0x01,0x01,0x10,0x01,0x19,0x81,0x74,0xF0,0x2E,0x05, +0x94,0x82,0x11,0x82,0x13,0x49,0x10,0xF3,0x01,0x00,0x14,0x10,0x00,0x80,0x15,0x10, +0x01,0x80,0x4D,0xFF,0x0C,0x81,0x10,0x81,0x8B,0x6C,0x8F,0x14,0x14,0x8A,0x13,0x8A, +0x11,0x8A,0x74,0xF0,0x85,0x05,0x00,0xFC,0x95,0xF4, + +/* size */ 0xa8, 0x00, 0x00, 0x00, +/* addr */ 0x79, 0x58, 0x00, 0x00, + +0x06,0x4A,0x07,0x4A,0x9F,0xEA,0x07,0x77,0x00,0x03,0x4D,0x10,0x45,0xF8,0x9D,0x58, +0x13,0x77,0xD8,0x4F,0x71,0xF0,0x20,0x00,0x93,0x80,0x4D,0x80,0x20,0xF0,0x00,0x40, +0x4E,0x80,0x4F,0x80,0xF8,0x10,0x05,0x09,0x50,0x6F,0x68,0x0C,0x51,0x76,0x8F,0x02, +0x52,0x76,0x66,0x66,0x55,0x76,0x00,0x04,0x56,0x76,0x00,0x08,0x50,0x62,0x01,0x00, +0x53,0x80,0x50,0x62,0x02,0x00,0x54,0x80,0x13,0x77,0xD8,0x4F,0x15,0x77,0xC0,0x2C, +0x32,0xE7,0x20,0xEC,0x9B,0xE5,0x19,0x77,0x5E,0x01,0x13,0x72,0xBE,0x3F,0x10,0x77, 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+0x81,0x6F,0x4F,0x0D,0x43,0xFD,0x84,0xF7,0x40,0xF6,0x81,0x9A,0x57,0x10,0x45,0xF8, +0x17,0x59,0x14,0x77,0xD2,0x4F,0x21,0xA5,0x11,0x9B,0x00,0xFC,0x14,0x77,0xD1,0x4F, +0x21,0xA5,0x1F,0x91,0x2F,0xF0,0xFF,0x7F,0x87,0xF5,0x11,0x9B,0x00,0xFC,0x95,0xF4, + + +/* size */ 0xb6, 0x14, 0x00, 0x00, +/* addr */ 0xc8, 0x5a, 0x00, 0x00, + +0xFD,0xEE,0xF8,0x76,0x41,0x4C,0x5E,0x5B,0xF8,0x61,0x38,0x0C,0x04,0x00,0x20,0xF8, +0xD4,0x5A,0xF8,0x76,0x06,0x4C,0xAD,0x5C,0x20,0xF0,0xFE,0xFF,0xF8,0x18,0xF7,0x08, +0xF8,0x80,0xC5,0x09,0xF8,0x76,0x56,0x4C,0xB4,0x5E,0xF8,0x76,0x13,0x4C,0xC9,0x5E, +0xF8,0x76,0x28,0x4C,0xCC,0x5C,0xF8,0x71,0x88,0x00,0x00,0x5A,0xF8,0x76,0x37,0x4C, +0xE9,0x5C,0xF8,0x76,0x3D,0x4C,0xFA,0x5B,0xF8,0x68,0xE3,0x08,0xE0,0xFF,0xF8,0x76, +0x51,0x4C,0xDF,0x5B,0xF8,0x76,0x65,0x3F,0x55,0x64,0x00,0x76,0x2A,0x03,0xF8,0x11, +0x44,0x4C,0x1C,0xE8,0xE3,0xF5,0xF8,0x11,0x5E,0x3F,0x20,0xF0,0x21,0x64,0xE3,0xF5, +0x00,0x76,0x51,0x03,0xF8,0x11,0x44,0x4C,0x1D,0xE8,0xE3,0xF5,0xF8,0x76,0x4C,0x4C, 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