FreeCalypso > hg > fc-magnetite
changeset 619:5a0ddb29c58e
targets/dsp34test.{conf,h} created for DSP 34 experiments
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 06 Oct 2019 22:25:10 +0000 |
parents | ed403a239ec6 |
children | 76f09f1bea5d |
files | targets/dsp34test.conf targets/dsp34test.h |
diffstat | 2 files changed, 22 insertions(+), 0 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/dsp34test.conf Sun Oct 06 22:25:10 2019 +0000 @@ -0,0 +1,21 @@ +# TI's TCS211 program supported 3 different Calypso silicon versions on their +# D-Sample and Leonardo boards: C05B (CHIPSET 8, DSP 33), early C035 +# (CHIPSET 10, DSP 34) and final C035 (CHIPSET 10, DSP 36). In FreeCalypso +# we generally work only with the last chipset (final C035), but we would like +# to support the two earlier ones as well, if possible. C05B has been partially +# exercised on the Mother's D-Sample board (non-functional Clara RF, no genuine +# tpudrv10.c source and too many unknowns), but the early C035 version with +# DSP 34 has not been tested at all yet. +# +# The Mother plans on testing the early C035 version of Calypso by populating +# a D751774A chip on an FCDEV3B and trying out the resulting combination; +# the present dsp34test fw build is to be flashed into those modified FCDEV3B +# boards. + +CHIPSET=10 +DSP=34 +RF=12 +LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_flash.template +RAM_LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_pirelli_ram.template +FLASH_BASE_ADDR=0 +FLASH_SECTOR_SIZE=0x40000