changeset 397:a513e7682ccf

l1_rf10.c: s/ANALOG/ANLG_FAM/
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 18 Jan 2018 01:41:00 +0000
parents 525d9f565947
children 91d64e076fb6
files src/cs/layer1/cust0/l1_rf10.c
diffstat 1 files changed, 3 insertions(+), 3 deletions(-) [+]
line wrap: on
line diff
--- a/src/cs/layer1/cust0/l1_rf10.c	Thu Jan 18 01:32:29 2018 +0000
+++ b/src/cs/layer1/cust0/l1_rf10.c	Thu Jan 18 01:41:00 2018 +0000
@@ -1476,7 +1476,7 @@
 /*------------------------------------------*/
 /* ABB Initialization words
 /*------------------------------------------*/
-#if (ANALOG == 1)
+#if (ANLG_FAM == 1)
   UWORD16 abb[ABB_TABLE_SIZE] =
   {
     C_AFCCTLADD,  // Value at reset              
@@ -1491,7 +1491,7 @@
     C_VBCR,       // VULSWITCH=0, VDLAUX=1, VDLEAR=1
     C_APCDEL      // value at reset
 };       
-#elif (ANALOG == 2)
+#elif (ANLG_FAM == 2)
   UWORD16 abb[ABB_TABLE_SIZE] =
   {
     C_AFCCTLADD,
@@ -1510,7 +1510,7 @@
     C_APCDEL2
   };
        
-#elif (ANALOG == 3)
+#elif (ANLG_FAM == 3)
   UWORD16 abb[ABB_TABLE_SIZE] =
   {
     C_AFCCTLADD,