FreeCalypso > hg > fc-magnetite
changeset 536:ae18f9aad7ce
C155 target support implemented in a way that should work
with this model's original bootloader
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 05 Nov 2018 23:15:45 +0000 |
| parents | bb9a08797022 |
| children | 3575e65c059e |
| files | components/main components/main-init configure.sh makefile-frags/m0-to-bin-c155 src/cs/system/main/int.s src/cs/system/template/gsm_ds_motc155.template targets/c155.conf targets/c155.h |
| diffstat | 8 files changed, 237 insertions(+), 6 deletions(-) [+] |
line wrap: on
line diff
--- a/components/main Mon Nov 05 17:30:51 2018 +0000 +++ b/components/main Mon Nov 05 23:15:45 2018 +0000 @@ -70,4 +70,11 @@ ASMFLAGS="$ASMFLAGS -dOP_WCP=0" ASMFLAGS="$ASMFLAGS -dWCP_PROF=0" +if [ "$TARGET" = c155 ] +then + ASMFLAGS="$ASMFLAGS -dC155_TARGET=1" +else + ASMFLAGS="$ASMFLAGS -dC155_TARGET=0" +fi + asm_file $SRCDIR/int.s
--- a/components/main-init Mon Nov 05 17:30:51 2018 +0000 +++ b/components/main-init Mon Nov 05 23:15:45 2018 +0000 @@ -78,4 +78,11 @@ ASMFLAGS="$ASMFLAGS -dOP_WCP=0" ASMFLAGS="$ASMFLAGS -dWCP_PROF=0" +if [ "$TARGET" = c155 ] +then + ASMFLAGS="$ASMFLAGS -dC155_TARGET=1" +else + ASMFLAGS="$ASMFLAGS -dC155_TARGET=0" +fi + asm_file $SRCDIR/int.s
--- a/configure.sh Mon Nov 05 17:30:51 2018 +0000 +++ b/configure.sh Mon Nov 05 23:15:45 2018 +0000 @@ -274,12 +274,19 @@ fi cat makefile-frags/link-steps >> $BUILD_DIR/Makefile -if [ "$TARGET" != c11x -a "$TARGET" != c139 -a "$TARGET" != c155 ] -then - cat makefile-frags/m0-to-bin-std >> $BUILD_DIR/Makefile -else - cat makefile-frags/m0-to-bin-c139 >> $BUILD_DIR/Makefile -fi + +case "$TARGET" in + c11x|c139) + cat makefile-frags/m0-to-bin-c139 >> $BUILD_DIR/Makefile + ;; + c155) + cat makefile-frags/m0-to-bin-c155 >> $BUILD_DIR/Makefile + ;; + *) + cat makefile-frags/m0-to-bin-std >> $BUILD_DIR/Makefile + ;; +esac + cat makefile-frags/flash-script-gen >> $BUILD_DIR/Makefile if [ -n "$RAM_LINK_SCRIPT_SRC" ]
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/makefile-frags/m0-to-bin-c155 Mon Nov 05 23:15:45 2018 +0000 @@ -0,0 +1,6 @@ +fwimage.intbin: fwimage.m0 + ../helpers/mokosrec2bin $< $@ FF + +fwimage.bin: fwimage.intbin + dd if=$< of=$@ bs=65536 skip=2 +
--- a/src/cs/system/main/int.s Mon Nov 05 17:30:51 2018 +0000 +++ b/src/cs/system/main/int.s Mon Nov 05 23:15:45 2018 +0000 @@ -335,6 +335,12 @@ .ref .bss .ref end + .if C155_TARGET = 1 + .def INT_C155_Boot_Entry +INT_C155_Boot_Entry + B _INT_Initialize + .endif + ; ;/* Define indirect branching labels for the vector table */ ;
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/cs/system/template/gsm_ds_motc155.template Mon Nov 05 23:15:45 2018 +0000 @@ -0,0 +1,188 @@ +/* + * Integrated Protocol Stack Linker command file (all components) + * + * Target : ARM + * + * Copyright (c) Texas Instruments 2002, Condat 2002 + * + * This version of the linker script template has been concocted + * by Spacefalcon the Outlaw based on previous hacks. + */ + +-c /* Autoinitialize variables at runtime */ + +/*********************************/ +/* SPECIFY THE SYSTEM MEMORY MAP */ +/*********************************/ + +MEMORY +{ + /* CS0: Flash 4 Mbytes ****************************************************/ + /* Interrupt Vectors Table */ + I_MEM (RXI) : org = 0x00000000 len = 0x00000100 + + /* Boot Sector */ + B_MEM (RXI) : org = 0x00000100 len = 0x00001f00 + + /* Magic Word for Calypso Boot ROM */ + MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001 + + /* Program Memory */ + P_MEM1 (RXI) : org = 0x000200E0 len = 0x00000700 + P_MEM2 (RXI) : org = 0x000207E0 len = 0x00000004 + P_MEM3 (RXI) : org = 0x000207E4 len = 0x00400000 + + /* FFS Area */ + FFS_MEM (RX) : org = 0x00700000 len = 0x000D0000 + /**************************************************************************/ + + /* CS1: External SRAM 2 Mbytes ********************************************/ + /* Data Memory */ + + /* We do the same splitting hack as on other targets */ + + D_MEM1 (RW) : org = 0x01000000 len = 0x00100000 + D_MEM2 (RW) : org = 0x01100000 len = 0x00100000 + /**************************************************************************/ + + /* CS6: Calypso Internal SRAM 256 kbytes **********************************/ + /* Code & Variables Memory */ + S_MEM (RXW) : org = 0x00800000 len = 0x00040000 + /**************************************************************************/ +} + +/***********************************************/ +/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ +/***********************************************/ + +/* + * Since the bootloader directly calls the INT_Initialize() routine located + * in int.s, this int.s code must always be mapped at the same address + * (usually in the second flash sector). Its length is about 0x500 bytes. + * Then comes the code that need to be loaded into the internal RAM. + */ + +SECTIONS +{ + .intvecs : {} > I_MEM /* Interrupt Vectors Table */ + .monitor : > B_MEM /* Monitor Constants & Code */ + { + $(CONST_BOOT_LIB) + } + + .inttext : {} > P_MEM1 /* int.s Code */ + + .bss_dar : > D_MEM1 /* DAR SWE Variables */ + { + $(BSS_DAR_LIB) + } + + /* + * The .bss section should not be split to ensure it is initialized to 0 + * each time the SW is reset. So the whole .bss is mapped either in D_MEM1 + * or in D_MEM2. + * + * Falcon's note for K5A3281: see the comments above where the memory + * regions are defined. + */ + + .bss : > D_MEM1 | D_MEM2 /* Global & Static Variables */ + { + $(BSS_BOOT_LIB) + } + + /* + * All .bss sections, which must be mapped in internal RAM must be + * grouped in order to initialized the corresponding memory to 0. + * This initialization is done in int.s file before calling the Nucleus + * routine. + */ + + GROUP + { + S_D_Mem /* Label of start address of .bss section in Int. RAM */ + .DintMem + { + + /* + * .bss sections of the application + */ + + $(BSS_LIBS) + + } + + API_HISR_stack : {} + + E_D_Mem /* Label of end address of .bss section in Int. RAM */ + } > S_MEM + + /* + * .text and .const sections which must be mapped in internal RAM. + */ + + .ldfl : {} > P_MEM2 /* Used to know the start load address */ + GROUP load = P_MEM3, run = S_MEM + { + S_P_Mem /* Label of start address of .text & .const sections in Int. RAM */ + .PIntMem + { + /* + * .text and .const sections of the application. + * + * The .veneer sections correspond exactly to .text:v&n sections + * implementing the veneer functions. The .text:v$n -> .veneer + * translation is performed by PTOOL software when PTOOL_OPTIONS + * environement variable is set to veneer_section. + */ + + $(CONST_LIBS) + + } + E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */ + } + + /* + * The rest of the code is mapped in flash, however the trampolines + * load address should be consistent with .text. + */ + COMMENT2START + `trampolines load = P_MEM3, run = S_MEM + COMMENT2END + + .text : {} > P_MEM3 /* Code */ + + /* + * The rest of the constants is mapped in flash. + * The .cinit section should not be split. + */ + + .cinit : {} > P_MEM3 /* Initialization Tables */ + .const : {} > P_MEM3 /* Constant Data */ + KadaAPI : {} > P_MEM3 /* ROMized CLDC */ + + .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */ + + .stackandheap : > D_MEM1 /* System Stacks, etc... */ + { + /* Leave 20 32bit words for register pushes. */ + . = align(8); + . += 20 * 4; + + /* Stack for abort and/or undefined modes. */ + exception_stack = .; + + /* Leave 38 32bit words for state saving on exceptions. */ + _xdump_buffer = .; + . += 38 * 4; + . = align(8); + + /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */ + stack_segment = .; + . += 0xB00; + } + + .data : {} > D_MEM1 /* Initialized Data */ + .sysmem : {} > D_MEM1 /* Dynamic Memory Allocation Area */ + +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/c155.conf Mon Nov 05 23:15:45 2018 +0000 @@ -0,0 +1,6 @@ +LINK_SCRIPT_SRC=src/cs/system/template/gsm_ds_motc155.template +MAIN_blob=blobs/patches/main-rvtmodem.lib +INIT_blob=blobs/patches/main-rvtmodem/init.obj +TPUDRV_blob= +FLASH_BASE_ADDR=0x20000 +FLASH_SECTOR_SIZE=0x10000