annotate README @ 5:3ae4a6ca5639

add README
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 12 Oct 2024 03:11:17 +0000
parents
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
5
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 The project contained in this repository is a mechanism for capturing the
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 decoded 16-bit linear PCM form of voice call downlink on FreeCalypso boards
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 via MCSI, and for feeding 16-bit linear PCM into call uplink via the same
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 interface. The mechanism consists of a Lattice Icestick FPGA board, a gateware
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 image for this FPGA, and host programs that interface to it via the UART channel
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 of the on-board FT2232H.
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 So far only downlink Rx has been implemented; to get the uplink path, more work
3ae4a6ca5639 add README
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 is needed on both FPGA gateware and software components.