annotate .hgignore @ 15:8b49ea8aeb99

fc-mcsi-rxtx: more reliable fflush(stdout) in main loop
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 28 Oct 2024 23:43:10 +0000
parents 8a386263dd51
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 syntax: regexp
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2
2
a4918a161d2e sw: starting with libserial, copied from fc-sim-sniff
Mychaela Falconia <falcon@freecalypso.org>
parents: 1
diff changeset
3 \.[oa]$
a4918a161d2e sw: starting with libserial, copied from fc-sim-sniff
Mychaela Falconia <falcon@freecalypso.org>
parents: 1
diff changeset
4
1
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 \.asc$
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 \.bin$
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 \.json$
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 \.rpt$
3
de85c3680d7e sw: fc-mcsi-rx program put together
Mychaela Falconia <falcon@freecalypso.org>
parents: 2
diff changeset
9
de85c3680d7e sw: fc-mcsi-rx program put together
Mychaela Falconia <falcon@freecalypso.org>
parents: 2
diff changeset
10 ^sw/mcsi-rx/fc-mcsi-rx$
7
8a386263dd51 fc-mcsi-rxtx skeleton put together
Mychaela Falconia <falcon@freecalypso.org>
parents: 3
diff changeset
11 ^sw/mcsi-rxtx/fc-mcsi-rxtx$