FreeCalypso > hg > fc-pcm-if

annotate fpga/mcsi-rx/Makefile @ 11:e93a11f44e6f

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
fc-mcsi-rxtx: implement basic Tx
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 28 Oct 2024 06:34:42 +0000
parents b3190839cce3
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 VSRC= clk_check.v clk_edge.v mcsi_rx.v sync_inputs.v top.v uart_tx.v
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 PCF= ../common/icestick-mcsi.pcf
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 PROJ= fpga
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 all: ${PROJ}.bin timing.rpt
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 ${PROJ}.json: ${VSRC}
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 ../tools/yosys-tee top $@ synthesis.rpt ${VSRC}
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 ${PROJ}.asc: ${PROJ}.json ${PCF}
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 --json ${PROJ}.json -l pnr.rpt
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 ${PROJ}.bin: ${PROJ}.asc
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15 icepack $< $@
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 timing.rpt: ${PROJ}.asc
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18 icetime -d hx1k -mtr $@ $<
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 clean:
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 rm -f *.json *.asc *.bin *.rpt