sw/Makefile: add mcsi-rxtx
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Mychaela Falconia <falcon@freecalypso.org> |
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Mon, 28 Oct 2024 01:45:32 +0000 |
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Mychaela Falconia <falcon@freecalypso.org>
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1 The project contained in this repository is a mechanism for capturing the
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Mychaela Falconia <falcon@freecalypso.org>
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2 decoded 16-bit linear PCM form of voice call downlink on FreeCalypso boards
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Mychaela Falconia <falcon@freecalypso.org>
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3 via MCSI, and for feeding 16-bit linear PCM into call uplink via the same
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Mychaela Falconia <falcon@freecalypso.org>
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4 interface. The mechanism consists of a Lattice Icestick FPGA board, a gateware
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Mychaela Falconia <falcon@freecalypso.org>
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5 image for this FPGA, and host programs that interface to it via the UART channel
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Mychaela Falconia <falcon@freecalypso.org>
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6 of the on-board FT2232H.
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Mychaela Falconia <falcon@freecalypso.org>
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7
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Mychaela Falconia <falcon@freecalypso.org>
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8 So far only downlink Rx has been implemented; to get the uplink path, more work
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Mychaela Falconia <falcon@freecalypso.org>
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9 is needed on both FPGA gateware and software components.
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