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fc-mcsi-rxtx: fix bug in PCM sample Rx
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Oct 2024 01:41:33 +0000
parents b3190839cce3
children
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b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
parents:
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1 VSRC= clk_check.v clk_edge.v mcsi_rx.v sync_inputs.v top.v uart_tx.v
b3190839cce3 first FPGA version, MCSI Rx only
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2 PCF= ../common/icestick-mcsi.pcf
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
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3 PROJ= fpga
b3190839cce3 first FPGA version, MCSI Rx only
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4
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5 all: ${PROJ}.bin timing.rpt
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6
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7 ${PROJ}.json: ${VSRC}
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8 ../tools/yosys-tee top $@ synthesis.rpt ${VSRC}
b3190839cce3 first FPGA version, MCSI Rx only
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9
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10 ${PROJ}.asc: ${PROJ}.json ${PCF}
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
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11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \
b3190839cce3 first FPGA version, MCSI Rx only
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12 --json ${PROJ}.json -l pnr.rpt
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13
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14 ${PROJ}.bin: ${PROJ}.asc
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15 icepack $< $@
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16
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Mychaela Falconia <falcon@freecalypso.org>
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17 timing.rpt: ${PROJ}.asc
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18 icetime -d hx1k -mtr $@ $<
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19
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20 clean:
b3190839cce3 first FPGA version, MCSI Rx only
Mychaela Falconia <falcon@freecalypso.org>
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21 rm -f *.json *.asc *.bin *.rpt