FreeCalypso > hg > fc-pcm-if

annotate fpga/mcsi-rx/clk_check.v @ 16:f422d19c0118 default tip

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fc-mcsi-rxtx: fix bug in PCM sample Rx
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Oct 2024 01:41:33 +0000
parents b3190839cce3
children
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1 /*
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2 * The logic implemented in this module detects if MCSI_CLK is running or not,
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3 * for the purpose of visual indication on a LED. In the future Tx-capable
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4 * FPGA, this logic will also be used to reset the Tx buffer when the clock
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5 * stops.
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6 */
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8 module clk_check (IntClk, MCSI_CLK_sync, MCSI_CLK_running);
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10 input IntClk;
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11 input MCSI_CLK_sync;
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12 output MCSI_CLK_running;
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14 reg [15:0] shift_reg;
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16 always @(posedge IntClk)
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17 shift_reg <= {shift_reg[14:0],MCSI_CLK_sync};
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19 assign MCSI_CLK_running = (shift_reg != 16'h0000) && (shift_reg != 16'hFFFF);
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21 endmodule