FreeCalypso > hg > fc-selenite

annotate src/g23m-aci/uart/uart_rts.c @ 19:294b440431fe

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scripts/mk-component.sh: no more component flavors
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 22:08:52 +0000
parents d393cd9bb723
children
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project :
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4 | Modul :
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This modul is part of the entity UART and implements all
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18 | functions to handle the incoming process internal signals as
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19 | described in the SDL-documentation (RT-statemachine)
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20 +-----------------------------------------------------------------------------
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21 */
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22
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23 #ifndef UART_RTS_C
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24 #define UART_RTS_C
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25 #endif /* !UART_RTS_C */
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26
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27 #define ENTITY_UART
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28
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29 /*==== INCLUDES =============================================================*/
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30
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31 #ifdef _SIMULATION_
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32 #include <stdio.h>
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33 #endif
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34
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35 #ifdef WIN32
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36 #include "nucleus.h"
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37 #endif /* WIN32 */
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38 #include "typedefs.h" /* to get Condat data types */
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39 #include "vsi.h" /* to get a lot of macros */
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40 #include "macdef.h" /* to get a lot of macros */
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41 #include "custom.h"
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42 #include "gsm.h" /* to get a lot of macros */
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43 #include "cnf_uart.h" /* to get cnf-definitions */
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44 #include "mon_uart.h" /* to get mon-definitions */
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45 #include "prim.h" /* to get the definitions of used SAP and directions */
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46 #ifdef DTILIB
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47 #include "dti.h" /* to get dti lib */
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48 #endif /* DTILIB */
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49 #include "pei.h" /* to get PEI interface */
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50 #ifdef FF_MULTI_PORT
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51 #include "gsi.h" /* to get definitions of serial driver */
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52 #else /* FF_MULTI_PORT */
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53 #ifdef _TARGET_
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54 #include "uart/serialswitch.h"
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55 #include "uart/traceswitch.h"
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56 #else /* _TARGET_ */
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57 #include "serial_dat.h" /* to get definitions of serial driver */
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58 #endif /* _TARGET_ */
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59 #endif /* FF_MULTI_PORT */
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60 #include "uart.h" /* to get the global entity definitions */
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61
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62 /*==== CONST ================================================================*/
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63
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64 /*==== LOCAL VARS ===========================================================*/
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65
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66 /*==== PRIVATE FUNCTIONS ====================================================*/
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67
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68 /*==== PUBLIC FUNCTIONS =====================================================*/
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69
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70
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71
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72 /*
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73 +------------------------------------------------------------------------------
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74 | Function : sig_ker_rt_parameters_req
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75 +------------------------------------------------------------------------------
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76 | Description : Handles the internal signal SIG_KER_RT_PARAMETERS_REQ
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77 | This signal sets new start values for the three multiplexer
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78 | timers:
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79 | T1 - acknowledgement timer (in units of 10 ms)
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80 | T2 - response timer for multiplexer control channel
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81 | (in units of 10 ms)
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82 | T3 - wake-up response timer (in seconds)
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83 |
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84 | Parameters : t1 - new start value of timer T1
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85 | t2 - new start value of timer T2
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86 | t3 - new start value of timer T3
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87 |
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88 +------------------------------------------------------------------------------
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89 */
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90 GLOBAL void sig_ker_rt_parameters_req (UBYTE t1, UBYTE t2, UBYTE t3)
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91 {
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92 TRACE_ISIG( "sig_ker_rt_parameters_req" );
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93
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94 /*
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95 * set set new start values of timers
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96 */
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97 uart_data->rt.t1 = (T_TIME)t1 * 10;
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98 uart_data->rt.t2 = (T_TIME)t2 * 10;
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99 uart_data->rt.t3 = (T_TIME)t3 * 1000;
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100 } /* sig_ker_rt_parameters_req() */
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101
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102
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103
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104 /*
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105 +------------------------------------------------------------------------------
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106 | Function : sig_ker_rt_start_t1_req
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107 +------------------------------------------------------------------------------
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108 | Description : Handles the internal signal SIG_KER_RT_START_T1_REQ
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109 | which is used to (re-)start the timer t1
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110 |
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111 | Parameters : none
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112 |
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113 +------------------------------------------------------------------------------
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114 */
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115 GLOBAL void sig_ker_rt_start_t1_req ()
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116 {
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117 TRACE_ISIG( "sig_ker_rt_start_t1_req" );
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118
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119 if(TIMER_START(UART_handle, uart_data->timer_t1_index, uart_data->rt.t1 ) NEQ VSI_OK)
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120 {
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121 TRACE_ERROR_P1("VSI entity: Can't start timer t1, uart_rts.c(%d)", __LINE__);
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122 }
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123
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124 uart_data->rt.state_t1 = UART_RT_STARTED;
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125
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126 } /* sig_ker_rt_start_t1_req() */
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127
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128
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129
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130 /*
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131 +------------------------------------------------------------------------------
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diff changeset
132 | Function : sig_ker_rt_start_t2_req
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 | Description : Handles the internal signal SIG_KER_RT_START_T2_REQ
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 | which is used to (re-)start the timer t2
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 |
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 | Parameters : none
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 |
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 GLOBAL void sig_ker_rt_start_t2_req ()
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 TRACE_ISIG( "sig_ker_rt_start_t2_req" );
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 if(TIMER_START(UART_handle, uart_data->timer_t2_index, uart_data->rt.t2 ) NEQ VSI_OK)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 TRACE_ERROR_P1("VSI entity: Can't start timer t2, uart_rts.c(%d)", __LINE__);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 uart_data->rt.state_t2 = UART_RT_STARTED;
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 } /* sig_ker_rt_start_t2_req() */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 | Function : sig_ker_rt_start_t3_req
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 | Description : Handles the internal signal SIG_KER_RT_START_T3_REQ
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 | which is used to (re-)start the timer t3
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 | Parameters : none
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 GLOBAL void sig_ker_rt_start_t3_req ()
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 TRACE_ISIG( "sig_ker_rt_start_t3_req" );
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 if(TIMER_START(UART_handle, uart_data->timer_t3_index, uart_data->rt.t3 ) NEQ VSI_OK)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 TRACE_ERROR_P1("VSI entity: Can't start timer t3, uart_rts.c(%d)", __LINE__);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 uart_data->rt.state_t3 = UART_RT_STARTED;
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 } /* sig_ker_rt_start_t3_req() */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 | Function : sig_dtx_rt_start_tesd_req
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 | Description : Handles the internal signal SIG_DTX_RT_START_TESD_REQ
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 | which is used to start the timer tesd
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 | Parameters : tesd_value - startvalue of TESD
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 GLOBAL void sig_dtx_rt_start_tesd_req (T_TIME tesd_value)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 TRACE_ISIG( "sig_dtx_rt_start_tesd_req" );
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 * store lowest value
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 if (tesd_value < uart_data->rt.tesd)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #ifdef _SIMULATION_
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 TRACE_EVENT_P1("ESD: New start value uart_data->rt.tesd: %d", tesd_value);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #endif /* _SIMULATION_ */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 uart_data->rt.tesd = tesd_value;
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 /*
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 * 1. This is the "first" call to sig_dtx_rt_start_tesd_req:
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 * state is UART_RT_STOPPED
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 * 2. Called from sig_ker_dtx_timeout_tesd_req:
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 * state is still UART_RT_STARTED (is reset to UART_RT_STOPPED when none
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 * of the DLCs wants to restart TESD)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214 if (uart_data->rt.state_tesd EQ UART_RT_STOPPED)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 #ifdef _SIMULATION_
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 TRACE_EVENT_P1("ESD: Start timer TESD( %d )", uart_data->rt.tesd);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #endif /* _SIMULATION_ */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 if(TIMER_START (UART_handle, uart_data->timer_tesd_index, uart_data->rt.tesd ) NEQ VSI_OK)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 TRACE_ERROR_P1("VSI entity: Can't start timer, uart_rts.c(%d)", __LINE__);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 uart_data->rt.state_tesd = UART_RT_STARTED;
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #ifdef _SIMULATION_
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 else
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 TRACE_EVENT("ESD: Timer TESD will be started later !");
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 #endif /* _SIMULATION_ */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 } /* sig_dtx_rt_start_tesd_req() */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 /*
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 | Function : sig_ker_rt_stop_t1_req
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 | Description : Handles the internal signal SIG_KER_RT_STOP_T1_REQ
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 |
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 | Parameters : none
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 |
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 +------------------------------------------------------------------------------
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 GLOBAL void sig_ker_rt_stop_t1_req ()
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 TRACE_ISIG( "sig_ker_rt_stop_t1_req" );
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 if( uart_data->rt.state_t1 EQ UART_RT_STARTED )
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 if(TIMER_STOP(UART_handle, uart_data->timer_t1_index ) NEQ VSI_OK)
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 {
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 TRACE_ERROR_P1("VSI entity: Can't stop timer t1, uartrts.c(%d)", __LINE__);
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 }
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 uart_data->rt.state_t1 = UART_RT_STOPPED;
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 } /* sig_ker_rt_stop_t1_req() */
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 /*
d393cd9bb723 src/g23m-*: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 +------------------------------------------------------------------------------
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Mychaela Falconia <falcon@freecalypso.org>
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264 | Function : sig_ker_rt_stop_t2_req
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265 +------------------------------------------------------------------------------
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266 | Description : Handles the internal signal SIG_KER_RT_STOP_T2_REQ
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267 |
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268 | Parameters : none
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269 |
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270 +------------------------------------------------------------------------------
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271 */
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272 GLOBAL void sig_ker_rt_stop_t2_req ()
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273 {
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274 TRACE_ISIG( "sig_ker_rt_stop_t2_req" );
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275
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276 if( uart_data->rt.state_t2 EQ UART_RT_STARTED )
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277 {
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278 if(TIMER_STOP(UART_handle, uart_data->timer_t2_index ) NEQ VSI_OK)
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279 {
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280 TRACE_ERROR_P1("VSI entity: Can't stop timer t2, uart_rts.c(%d)",__LINE__);
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281 }
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282 }
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283
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284 uart_data->rt.state_t2 = UART_RT_STOPPED;
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285 } /* sig_ker_rt_stop_t2_req() */
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286
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287
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288
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289 /*
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290 +------------------------------------------------------------------------------
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291 | Function : sig_ker_rt_stop_t3_req
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292 +------------------------------------------------------------------------------
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293 | Description : Handles the internal signal SIG_KER_RT_STOP_T3_REQ
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294 |
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295 | Parameters : none
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296 |
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297 +------------------------------------------------------------------------------
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298 */
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299 GLOBAL void sig_ker_rt_stop_t3_req ()
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300 {
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301 TRACE_ISIG( "sig_ker_rt_stop_t3_req" );
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302
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303 if( uart_data->rt.state_t3 EQ UART_RT_STARTED )
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304 {
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305 if(TIMER_STOP(UART_handle, uart_data->timer_t3_index ) NEQ VSI_OK)
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306 {
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307 TRACE_ERROR_P1("VSI entity: Can't stop timer t3, uart_rts.c(%d)", __LINE__);
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308 }
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309 }
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310
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311 uart_data->rt.state_t3 = UART_RT_STOPPED;
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312 } /* sig_ker_rt_stop_t3_req() */
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313
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314
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315 /*
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316 +------------------------------------------------------------------------------
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317 | Function : sig_dtx_rt_stop_tesd_req
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318 +------------------------------------------------------------------------------
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319 | Description : Handles the internal signal SIG_DTX_RT_STOP_TESD_REQ
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320 |
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321 | Parameters : none
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322 |
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323 +------------------------------------------------------------------------------
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324 */
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325 GLOBAL void sig_dtx_rt_stop_tesd_req ()
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326 {
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327 TRACE_ISIG( "sig_dtx_rt_stop_tesd_req" );
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328
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329 if( uart_data->rt.state_tesd EQ UART_RT_STARTED )
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330 {
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331 if(TIMER_STOP(UART_handle, uart_data->timer_tesd_index ) NEQ VSI_OK)
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332 {
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333 TRACE_ERROR_P1("VSI entity: Can't stop timer, uart_rts.c(%d)", __LINE__);
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334 }
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335 }
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336
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337 uart_data->rt.state_tesd = UART_RT_STOPPED;
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338 } /* sig_dtx_rt_stop_tesd_req() */