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annotate components/l1_ext @ 66:3d8f62baeca1

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src/cs/drivers/drv_app/r2d/r2d_config.h: include case fixes
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 20 Jul 2018 00:28:56 +0000
parents 1eb391057168
children 1155be085fc1
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1 # Building l1_ext.lib
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2
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3 CFLAGS="-g -me -pw2 -mt -o -mw"
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4 CFLAGS_gcc="-O2 -fno-builtin -mthumb-interwork -mthumb"
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5 CPPFLAGS="-DRV_TRACE_LEVEL_WARNING=2 -DTOOL_CHOICE=0 -D_TMS470"
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6
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7 # Includes
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8
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9 CPPFLAGS="$CPPFLAGS -I../config"
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10 CPPFLAGS="$CPPFLAGS -I$SRC/nucleus"
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11 CPPFLAGS="$CPPFLAGS -I.."
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12 CPPFLAGS="$CPPFLAGS -I$SRC/gpf/frame/cust_os"
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13 CPPFLAGS="$CPPFLAGS -I$SRC/cs/system"
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14 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app"
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15 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/buzzer"
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16 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/ffs"
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17 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/sim"
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18 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_app/uart"
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19 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera"
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20 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rv"
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21 CPPFLAGS="$CPPFLAGS -I$SRC/cs/riviera/rvt"
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22 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services"
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1eb391057168 Main and Audio source directories lowercased
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23 CPPFLAGS="$CPPFLAGS -I$SRC/cs/services/audio"
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24 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_cust0"
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25 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/audio_include"
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26 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/cust0"
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27 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/hmacs"
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28 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/include"
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29 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/p_include"
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30 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_include"
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31 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tm_cust0"
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32 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/dyn_dwl_include"
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33 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/p_source0"
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34 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source0"
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35 CPPFLAGS="$CPPFLAGS -I$SRC/cs/layer1/tpu_drivers/source"
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36 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core"
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37 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/abb"
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38 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/armio"
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39 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/clkm"
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40 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/conf"
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41 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dma"
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42 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/dsp_dwnld"
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43 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/inth"
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44 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/memif"
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45 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/rhea"
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46 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/security"
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47 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/spi"
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48 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/timer"
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49 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/uart"
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50 CPPFLAGS="$CPPFLAGS -I$SRC/cs/drivers/drv_core/ulpd"
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51
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52 # Source modules
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53
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54 SRCDIR=$SRC/cs/layer1
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55
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56 c_file $SRCDIR/cfile/l1_pwmgr.c
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57 c_file $SRCDIR/cfile/l1_afunc.c
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58 c_file $SRCDIR/cfile/l1_trace.c
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59 c_file $SRCDIR/cfile/l1_init.c
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60 c_file $SRCDIR/cfile/l1_sync.c
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61 c_file $SRCDIR/cfile/l1_cmplx.c
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62
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63 c_file $SRCDIR/tm_cfile/l1tm_async.c
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64 c_file $SRCDIR/tm_cfile/l1tm_func.c
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65 c_file $SRCDIR/tm_cfile/l1tm_stats.c
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66
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67 c_file $SRCDIR/audio_cfile/l1audio_async.c
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68 c_file $SRCDIR/audio_cfile/l1audio_afunc.c
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69 c_file $SRCDIR/audio_cfile/l1audio_init.c
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70 c_file $SRCDIR/audio_cfile/l1audio_drive.c
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71 c_file $SRCDIR/audio_cfile/l1audio_back.c
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72 c_file $SRCDIR/audio_cfile/l1audio_abb.c
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73
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74 #c_file $SRCDIR/gtt_cfile/l1gtt_async.c
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75 #c_file $SRCDIR/gtt_cfile/l1gtt_sync.c
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76 #c_file $SRCDIR/gtt_cfile/l1gtt_func.c
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77 #c_file $SRCDIR/gtt_cfile/l1gtt_drive.c
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78 #c_file $SRCDIR/gtt_cfile/l1gtt_init.c
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79 #c_file $SRCDIR/gtt_cfile/l1gtt_back.c
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80 #c_file $SRCDIR/gtt_cfile/l1gtt_baudot_functions.c
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81 #c_file $SRCDIR/gtt_cfile/ctm/conv_encoder.c
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82 #c_file $SRCDIR/gtt_cfile/ctm/conv_poly.c
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83 #c_file $SRCDIR/gtt_cfile/ctm/ctm_receiver.c
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84 #c_file $SRCDIR/gtt_cfile/ctm/ctm_transmitter.c
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85 #c_file $SRCDIR/gtt_cfile/ctm/diag_interleaver.c
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86 #c_file $SRCDIR/gtt_cfile/ctm/m_sequence.c
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87 #c_file $SRCDIR/gtt_cfile/ctm/ucs_functions.c
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88 #c_file $SRCDIR/gtt_cfile/ctm/diag_deinterleaver.c
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89 #c_file $SRCDIR/gtt_cfile/ctm/fifo.c
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90 #c_file $SRCDIR/gtt_cfile/ctm/init_interleaver.c
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91
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92 if [ "$L1_DYN_DSP_DWNLD" = 1 ]
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93 then
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94 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_afunc.c
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95 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_async.c
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96 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_init.c
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97 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_sync.c
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98 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_apihisr.c
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99 c_file $SRCDIR/dyn_dwl_cfile/l1_dyn_dwl_func.c
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100 c_file $SRCDIR/dsp1/Dyn_dwnld/tty_patch_file36_10.c
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101 c_file $SRCDIR/dsp1/Dyn_dwnld/amr_mms_patch_file36_10.c
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102 c_file $SRCDIR/dsp1/Dyn_dwnld/amr_sch_patch_file36_10.c
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103 c_file $SRCDIR/dsp1/Dyn_dwnld/e2_patch_file36_10.c
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104 c_file $SRCDIR/dsp1/Dyn_dwnld/speech_acoustic_patch_file36_10.c
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105 c_file $SRCDIR/dsp1/Dyn_dwnld/gprs_patch_file36_10.c
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106 c_file $SRCDIR/dsp1/patch_file36_10_dyn_dwl.c
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107 else
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108 c_file $SRCDIR/dsp1/patch_file${DSP}_${CHIPSET}.c
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109 fi
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110
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111 c_file $SRCDIR/dsp1/leadboot.c
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112
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113 if [ "$GPRS" = 1 ]
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114 then
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115 c_file $SRCDIR/p_cfile/l1p_afun.c
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116 c_file $SRCDIR/p_cfile/l1p_asyn.c
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117 c_file $SRCDIR/p_cfile/l1p_cmpl.c
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parents: 10
diff changeset
118 c_file $SRCDIR/p_cfile/l1p_sync.c
10
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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119 fi
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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120
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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121 # Different CFLAGS for l1_small.c
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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122
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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123 CFLAGS="-g -me -pw2 -mw"
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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124
22
0a1a78944683 components: first automated conversion pass
Mychaela Falconia <falcon@freecalypso.org>
parents: 10
diff changeset
125 c_file $SRCDIR/cfile/l1_small.c
10
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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126
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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127 # Different again for l1_async.c
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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128
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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129 CFLAGS="-g -me -pw2 -mt -mw -o1"
a8f9cc376e98 components: pruned import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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130
22
0a1a78944683 components: first automated conversion pass
Mychaela Falconia <falcon@freecalypso.org>
parents: 10
diff changeset
131 c_file $SRCDIR/cfile/l1_async.c