annotate src/cs/system/main/gcc/vectors.S @ 79:621b358b760d

components/main: compile exceptions.S for gcc
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 20 Jul 2018 06:51:54 +0000
parents 95ef11e76c5b
children
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95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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1 /*
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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2 * These 7 branch instructions, corresponding to ARM exception and interrupt
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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3 * vectors, will be placed in different sections depending on the flashImage
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
Mychaela Falconia <falcon@freecalypso.org>
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4 * vs. ramImage configuration and which target we build for; this little
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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5 * snippet file will be #included where it is needed.
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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6 */
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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7
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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8 b _arm_undefined
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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9 b _arm_swi
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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10 b _arm_abort_prefetch
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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11 b _arm_abort_data
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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12 b _arm_reserved
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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13 b _INT_IRQ
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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14 b _INT_FIQ