annotate src/cs/layer1/include/l1_confg.h @ 193:6a53de2c4fc2

R2D sync with Magnetite R2D is never compiled in Selenite, thus the present change has absolutely no impact on anything - but this sync is being done in order to keep the overall diff between Magnetite and Selenite to a minimum.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 23 May 2020 07:13:36 +0000
parents b6a5e36de839
children
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1 /************* Revision Controle System Header *************
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2 * GSM Layer 1 software
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3 * L1_CONFG.H
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4 *
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5 * Filename l1_confg.h
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6 * Copyright 2003 (C) Texas Instruments
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7 *
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8 ************* Revision Controle System Header *************/
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9
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10 #ifndef __L1_CONFG_H__
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11 #define __L1_CONFG_H__
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12
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13 #ifndef _WINDOWS
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14 #include "l1sw.cfg" // Configuration Software
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15 #include "board.cfg"
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16 #include "chipset.cfg"
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17 #include "rf.cfg"
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18 #include "swconfig.cfg"
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19 #include "sys.cfg"
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20 #endif
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21
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22 // Traces...
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23 // TRACE_TYPE == 1,2,3 are used in standalone mode (L2-L3 Simul) with USART
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24 // TRACE_TYPE == 4 is used on A-sample only (with UART): L1 + protocol stack
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25 // TRACE_TYPE == 1 -> L1/L3 interface trace
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26 // TRACE_TYPE == 2 -> Trace mode: ~33~~1~011...
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27 // TRACE_TYPE == 3 -> same as above (2) plus FER or stats trace
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28 // TRACE_TYPE == 4 -> L1/L3 interface trace on A-sample with protocol stack
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29 // TRACE_TYPE == 5 -> trace for full simulation
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30 // TRACE_TYPE == 6 -> CPU load trace for hisr
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31 // TRACE_TYPE == 7 -> CPU LOAD trace for layer 1 hisr for all TDMA. Output on
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32 // UART at 38400 bps =>
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33 // format : <hisr cpu value in microseconds> <frame number>
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34
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35 // Code PB reported workaround
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36 //------------------------------
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37
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38
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39 // Code Version possible choices
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40 //------------------------------
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41 #define SIMULATION 1
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42 #define NOT_SIMULATION 2
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43
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44 // RCL functions Version possible choices
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45 //------------------------------
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46 #define POLL_FORCED 0
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47 #define RLC_SCENARIO 1
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48 #define MODEM_FLOW 2
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49
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50 // possible choices for UART trace output
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51 //------------------------------
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52 #define MODEM_UART 0
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53 #define IRDA_UART 1
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54 #if (CHIPSET == 12)
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55 #define MODEM2_UART 2
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56 #endif
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57
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58 //============
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59 // CODE CHOICE
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60 //============
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61 #if (OP_L1_STANDALONE==0)
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62 #define CODE_VERSION NOT_SIMULATION
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63 #else // OP_L1_STANDALONE
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64 #ifdef WIN32
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65 #define CODE_VERSION SIMULATION
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66 #else // WIN32
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67 #define CODE_VERSION NOT_SIMULATION
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68 #endif // WIN32
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69 #endif // OP_L1_STANDALONE
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70
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71 //---------------------------------------------------------------------------------
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72 // Test with full simulation.
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73 //---------------------------------------------------------------------------------
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74 #if (CODE_VERSION == SIMULATION)
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75
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76 // Test Scenari...
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77 #define SCENARIO_FILE 1 // Test Scenario comes from input files.
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78 #define SCENARIO_MEM 0 // Test Scenario comes from RAM.
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79
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80 // Traces...
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81 #undef TRACE_TYPE
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82 #define TRACE_TYPE 5
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83 #define LOGFILE_TRACE 1 // trace in an output logfile
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84 #define FLOWCHART 0 // Message sequence/flow chart trace.
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85 #define NUCLEUS_TRACE 0 // Nucleus error trace
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86 #define EOTD_TRACE 1 // EOTD log trace
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87 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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88
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89 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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90
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91 // Control algorithms...
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92 #define AFC_ALGO 1 // AFC algorithm.
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93 #define TOA_ALGO 1 // TOA algorithm.
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94 #define AGC_ALGO 1 // AGC algorithm.
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95 #define TA_ALGO 0 // TA (Timing Advance) algorithm.
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96 #undef VCXO_ALGO
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97 #define VCXO_ALGO 0 // VCXO algo
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98 #undef DCO_ALGO
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99 #define DCO_ALGO 0 // DCO algo (TIDE)
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100 #undef ORDER2_TX_TEMP_CAL
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101 #define ORDER2_TX_TEMP_CAL 0 // TX Temperature Compensation Algorithm selection
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102
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103
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104 #define FACCH_TEST 0 // FACCH test enabled.
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105
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106 #define ADC_TIMER_ON 0 // Timer for ADC measurements
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107 #define AFC_ON 1 // Enable of the Omega AFC module
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108
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109 #define AUDIO_TASK 1 // Enable the L1 audio features
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110 #define AUDIO_SIMULATION 1 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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111 #define AUDIO_L1_STANDALONE 0 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
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112
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113 #define GTT_SIMULATION 1 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
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114 #define TTY_SYNC_MCU 1 // TTY WORKAROUND BUG03401
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115 #define TTY_SYNC_MCU_2 1 //
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116 #define L1_GTT_FIFO_TEST_ATOMIC 0 //
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117 #define NEW_WKA_PATCH 0
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118 #define OPTIMISED 1
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119
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120 #define L1_RECOVERY 0 // L1 recovery
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121
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122 #undef L1_GPRS
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123 #define L1_GPRS 1 // GPRS L1: MS supporting both Circuit Switched and Packet (GPRS) capabilities
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124
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125 #undef AMR
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126 #define AMR 1 // AMR version 1.0 supported
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127
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128 #undef L1_12NEIGH
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129 #define L1_12NEIGH 1 // new L1-RR interface for 12 neighbour cells
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130
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131 #undef L1_GTT
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diff changeset
132 #define L1_GTT 1 // Enable Global Text Telephony feature for simulation
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parents:
diff changeset
133
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parents:
diff changeset
134 #undef OP_L1_STANDALONE
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
135 #define OP_L1_STANDALONE 1 // Selection of code for L1 stand alone
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parents:
diff changeset
136
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #undef OP_RIV_AUDIO
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
138 #define OP_RIV_AUDIO 0 // Selection of code for Riviera audio
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
139
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #undef OP_WCP
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
141 #define OP_WCP 0 // No WCP integration
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 //---------------------------------------------------------------------------------
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parents:
diff changeset
143 // Test with H/W platform.
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parents:
diff changeset
144 //---------------------------------------------------------------------------------
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parents:
diff changeset
145 #elif (CODE_VERSION == NOT_SIMULATION)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 #define WA_PCTM_AGC_PARAMS 0 // to work by default with 4 parameters to calibration (compatible with PCTM if 1)
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parents:
diff changeset
148 // Work around about Calypso RevA: the bus is floating (Cf PB01435)
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parents:
diff changeset
149 // (corrected with Calypso ReV B and Calypso C035)
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parents:
diff changeset
150 #if (CHIPSET == 7)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define W_A_CALYPSO_BUG_01435 1
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
152 #else
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parents:
diff changeset
153 #define W_A_CALYPSO_BUG_01435 0
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parents:
diff changeset
154 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 // for AMR thresolds definition CQ22226
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 #define AMR_THRESHOLDS_WORKAROUND 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 #if (L1_GTT==1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 #define TTY_SYNC_MCU 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 #define TTY_SYNC_MCU_2 1
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
163 #define L1_GTT_FIFO_TEST_ATOMIC 0
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
164 #define NEW_WKA_PATCH 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 #define OPTIMISED 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #define TTY_SYNC_MCU_2 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 #define L1_GTT_FIFO_TEST_ATOMIC 0
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
169 #define TTY_SYNC_MCU 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 #define NEW_WKA_PATCH 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 #define OPTIMISED 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 // Traces...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 #define NUCLEUS_TRACE 0 // Nucleus error trace
b6a5e36de839 src/cs: initial import from Magnetite
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parents:
diff changeset
177 #define FLOWCHART 0 // Message sequence/flow chart trace.
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parents:
diff changeset
178 #define LOGFILE_TRACE 0 // trace in an output logfile
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parents:
diff changeset
179 #define TRACE_FULL_NAME 0 // display full fct names after a PM/COM error
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parents:
diff changeset
180
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 // Test Scenari...
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 #define SCENARIO_FILE 0 // Test Scenario comes from input files.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 #define SCENARIO_MEM 1 // // Test Scenario comes from RAM.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 #define L2_L3_SIMUL 1 // Layer 2 & Layer 3 simulated, main within NU_MAIN.C, trace possible.
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 #define L2_L3_SIMUL 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 // Control algorithms...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 #define AFC_ALGO 1 // AFC algorithm.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 //TOA Algorithm needs to be on for TestMode, otherwise no dedic test will be succesful!!!
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 #define TOA_ALGO 1 // TOA algorithm.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 #define AGC_ALGO 1 // AGC algorithm.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 #define TA_ALGO 1 // TA (Timing Advance) algorithm.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 #define FACCH_TEST 0 // FACCH test enabled.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 #define ADC_TIMER_ON 0 // Timer for ADC measurements
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 #define AFC_ON 1 // Enable of the Omega AFC module
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 #define AUDIO_TASK 1 // Enable the L1 audio features
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define AUDIO_SIMULATION 0 // Audio simulator for the audio tasks (works only with the new audio design i.e. AUDIO_TASK=1)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 #define AUDIO_L1_STANDALONE 1 // Flag to enable the audio simulator used with the L1 stand-alone (works only with the new audio design i.e. AUDIO_TASK=1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 #define AUDIO_L1_STANDALONE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 #define GTT_SIMULATION 0 // Gtt simulator for the gtt tasks (works only with if L1_GTT=1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 #define OP_BT 0 // Simulation of ISLAND (BLUETOOTH) sleep management
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #define L1_RECOVERY 1 // L1 recovery
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #if (L1_GPRS == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 #define RLC_VERSION RLC_SCENARIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 #if (RLC_VERSION == RLC_SCENARIO)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 #define RLC_DL_BLOCK_STAT 0 // Works with RLC_VERSION = RLC_SCENARIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 // output stat on CRC error blocks
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 // The user must enter the cs type and
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 // the number of frames desired.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 #define DSP_BACKGROUND_TASKS 1 // Enable the TEST of DSP background.tasks
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 // activated by a layer 3 message (BG_TASK_START (<task number>))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 // deactivated by a layer 3 message (BG_TASK_STOP (<task number>))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 // Warning : Works only with DSP>=31
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 #define DSP_BACKGROUND_TASKS 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 #define DSP_BACKGROUND_TASKS 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 #define RLC_DL_BLOCK_STAT 0 // Default value; Never change it
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 // Audio tasks selection
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 //-----------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 #if (AUDIO_TASK == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248 #define KEYBEEP 1 // Enable keybeep feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 #define TONE 1 // Enable tone feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 // Temporary modification for protocol stack compatibility - GSMLITE will be removed
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 #if (OP_L1_STANDALONE == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 #define GSMLITE 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 #if ((OP_L1_STANDALONE == 1) || (!GSMLITE))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 #define MELODY_E1 1 // Enable melody format E1 feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 #define VOICE_MEMO 1 // Enable voice memorization feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 #define FIR 1 // Enable FIR feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260 #define AUDIO_MODE 1 // Enable Audio mode feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 #define AUDIO_MODE 0 // Disable Audio mode feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 #define MELODY_E1 0 // Disable melody format E1 feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266 #define VOICE_MEMO 0 // Disable voice memorization feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 #define FIR 1 // Enable FIR feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 #define FIR 0 // Disable FIR feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 #define AUDIO_MODE 0 // Disable Audio mode feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 // Define CPORT for ESample only
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276 #if ((CHIPSET == 12) && ((DSP == 35) || (DSP == 36)))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 #define L1_CPORT 1 // Enable cport feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 #define L1_CPORT 0 // Disable cport feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 #define KEYBEEP 0 // Enable keybeep feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 #define TONE 0 // Enable tone feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285 #define MELODY_E1 0 // Enable melody format E1 feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 #define VOICE_MEMO 0 // Enable voice memorization feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 #define FIR 0 // Enable FIR feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 #define AUDIO_MODE 0 // Enable Audio mode feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 #define L1_CPORT 0 // Enable cport feature
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 #define L1_AUDIO_BACKGROUND_TASK (SPEECH_RECO | MELODY_E2) // audio background task is used by speech reco and melody_e2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 #if (OP_RIV_AUDIO == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 #define L1_AUDIO_DRIVER L1_VOICE_MEMO_AMR // Riviera audio driver (only Voice Memo AMR is available)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299 // Vocoder selections
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 //-------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 #define FR 1 // Full Rate
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303 #define FR_HR 2 // Full Rate + Half Rate
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 #define FR_EFR 3 // Full Rate + Enhanced Full Rate
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 #define FR_HR_EFR 4 // Full Rate + Half Rate + Enhanced Full Rate
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 // Standard (frequency plan) selections
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 //-------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 #define GSM 1 // GSM900.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311 #define GSM_E 2 // GSM900 Extended.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 #define PCS1900 3 // PCS1900.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 #define DCS1800 4 // DCS1800.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 #define DUAL 5 // Dual Band (GSM900 + DCS 1800 bands)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 #define DUALEXT 6 // Dual Band (E-GSM900 + DCS 1800 bands)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 #define GSM850 7 // GSM850 Band
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317 #define DUAL_US 8 // PCS1900 + GSM850
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 /* Power Management */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 #define PWR_MNGT 1 // POWER management active if l1_config.pwr_mngt=1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 /*---------------------------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326 /* DSP configurations */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 /* ------------------ */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 /* DSP | FR| HR|EFR|14.4| SPEED |12LA68|12LA68 |4L32|AEC| MCU/DSP */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 /* (version) | | | | | |POLE80|POLE112| |/NS| interface */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331 /* 0 (821) | x | | | | 39Mhz | x | | | | 1 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 /* 1 (830) | x | | | | 39Mhz | (1) | | x | | 1 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 /* 2 (912) | x | x | | | 58.5Mhz | x | | | | 2 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 /* 3 (10xx) | x | | x | x | 65Mhz | x | | | x | 3 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 /* ----------+---+---+---+----+---------+------+-------+----|---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 /* 4 (11xx) | x | x | x | x | 65Mhz | x | x (3)| | x | 3 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 /* 5 (830) | x | | | | 39Mhz | x | | | | 1 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 /* 6 (11xx) | x | x | x | x | 65Mhz | x | x (3)| |(2)| 3 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344 /* ----------+---+---+---+----+---------+------+-------+----+---+---------- */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 /* */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 /*(1) this version can be loaded on a 12LA68/POLE80 but the RIF/DL problem is*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 /* not corrected. */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348 /* */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 /*(2) AEC is disabled at DSP level but L1 must be compiled with MCU/DSP */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350 /* interface which support AEC, therefore AEC is defined as 1. */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 /* */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 /*(3) Pole112 include RIF DL correction. No patch is needed if this one only */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 /* include RIF/DL problem. */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 /* */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 /*---------------------------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 #if (DSP == 16 || DSP == 17)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 /* #define CLKMOD1 0x414e // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359 #define CLKMOD2 0x414e // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
360 #define CLKSTART 0x29 // ...65 Mips */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
361
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
362 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
363 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
364 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
365
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
366 /* #define CLKMOD1 0x2116 //This settings force the DSP to never enteridle
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
367 #define CLKMOD2 0x2116 //In this case the PLL will be always on. 39 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
368 #define CLKSTART 0x25 // ...39 Mips */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
369
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
370 #define VOC FR_HR_EFR // FR + HR + EFR.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
371 #define DATA14_4 1 // No 14.4 data allowed.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
372 #define AEC 1 // AEC/NS supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
373 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
374 #define DSP_START 0x2000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
375 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
376
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
377 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
378
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
379 /* DSP debug trace configuration */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
380 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
381 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
382 // In case of the melody E2 the DSP trace must be disable because the
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
383 // melody instrument waves are overlayed with DSP trace buffer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
384
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
385 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
386 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
387 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
388 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
389 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
390 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
391 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
392 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
393
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
394 #elif (DSP == 30) // First GPRS.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
395 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
396 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
397 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
398
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
399 #define VOC FR_HR_EFR // FR + HR + EFR.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
400 #define DATA14_4 1 // No 14.4 data allowed.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
401 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
402 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
403 #define DSP_START 0x1F81
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
404 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
405 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
406
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
407 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
408 #elif (DSP == 31) // ROM Code GPRS G0.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
409 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
410 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
411 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
412
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
413 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
414 #define DATA14_4 1 // 14.4 data allowed.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
415 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
416 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
417
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
418 #define DSP_START 0x8763
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
419
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
420 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
421 #define INSTALL_ADD_WITH_PATCH 0x1352 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
422
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
423 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
424 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
425
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
426 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
427 #elif (DSP == 32) // ROM Code GPRS G1.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
428 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
429 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
430 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
431
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
432 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
433 #define DATA14_4 1 // 14.4 data allowed.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
434 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
435 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
436
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
437 #define DSP_START 0x8763
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
438
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
439 #define INSTALL_ADD 0x87c9 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
440
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
441 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
442 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
443
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
444 #define W_A_DSP_SR_BGD 0 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
445 #elif (DSP == 33) // ROM Code GPRS.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
446 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
447 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
448 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
449 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
450 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
451 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
452 #if (OP_RIV_AUDIO == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
453 #define L1_NEW_AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
454 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
455 // Available but not yet tuned with Riviera AUDIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
456 #define L1_NEW_AEC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
457 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
458 #if ((L1_NEW_AEC) && (!AEC))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
459 // First undef the flag to avoid warnings at compilation time
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
460 #undef AEC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
461 #define AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
462 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
463
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
464 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
465
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
466 #define DSP_START 0x7000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
467
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
468 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
469
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
470 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
471 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
472
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
473 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
474
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
475 #if ( (CHIPSET != 12) && (CODE_VERSION == NOT_SIMULATION))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
476
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
477 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
478
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
479 // management.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
480
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
481 // DSP_IDLE3 is not supported in simulation
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
482
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
483 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
484 #define W_A_DSP_IDLE3 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
485 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
486
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
487 // DSP software work-around config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
488 // bit0 - Work-around to support CRTG.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
489 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
490 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
491 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
492
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
493 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
494 #define C_DSP_SW_WORK_AROUND 0x0006
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
495
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
496 #elif (ANLG_FAM == 2) // IOTA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
497 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
498
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
499 #elif (ANLG_FAM == 3) // SYREN
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
500 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
501
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
502 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
503
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
504 /* DSP debug trace configuration */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
505 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
506 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
507 // In case of the melody E2 the DSP trace must be disable because the
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
508 // melody instrument waves are overlayed with DSP trace buffer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
509
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
510 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
511 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
512 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
513
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
514 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
515 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
516 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
517 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
518
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
519 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
520 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
521 // Currently not supported !
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
522 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
523 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
524 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
525 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
526 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
527
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
528 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
529 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
530 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
531 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
532
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
533 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
534 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
535 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
536 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
537 /* d_error_status */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
538 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
539
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
540 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
541 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
542
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
543 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
544 #define DSP_DEBUG_GSM_MASK 0x0000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
545 #define DSP_DEBUG_GPRS_MASK 0x0f3d
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
546 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
547
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
548 #if DCO_ALGO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
549 // DCO type of scheduling
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
550 #define C_CN_DCO_PARAM 0xA248
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
551 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
552
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
553 #elif (DSP == 34) // ROM Code GPRS AMR.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
554 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
555 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
556 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
557 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
558 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
559 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
560 #if (OP_RIV_AUDIO == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
561 #define L1_NEW_AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
562 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
563 // Available but not yet tuned with Riviera AUDIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
564 #define L1_NEW_AEC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
565 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
566 #if ((L1_NEW_AEC) && (!AEC))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
567 // First undef the flag to avoid warnings at compilation time
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
568 #undef AEC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
569 #define AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
570 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
571 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
572
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
573 #define DSP_START 0x7000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
574
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
575 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
576
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
577 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
578 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
579
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
580 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
581
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
582 #if ( (CHIPSET != 12) && (CODE_VERSION == NOT_SIMULATION))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
583
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
584 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
585
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
586 // management.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
587
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
588 // DSP_IDLE3 is not supported in simulation
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
589
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
590 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
591 #define W_A_DSP_IDLE3 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
592 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
593
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
594 // DSP software work-around config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
595 // bit0 - Work-around to support CRTG.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
596 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
597 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
598 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
599 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
600 #define C_DSP_SW_WORK_AROUND 0x0006
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
601
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
602 #elif (ANLG_FAM == 2) // IOTA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
603 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
604
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
605 #elif (ANLG_FAM == 3) // SYREN
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
606 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
607
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
608 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
609
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
610 /* DSP debug trace configuration */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
611 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
612 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
613 // In case of the melody E2 the DSP trace must be disable because the
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
614 // melody instrument waves are overlayed with DSP trace buffer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
615
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
616 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
617 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
618 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
619
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
620 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
621 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
622 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
623 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
624
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
625 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
626 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
627 // Currently not supported !
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
628 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
629 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
630 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
631 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
632 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
633
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
634 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
635 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
636 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
637 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
638
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
639 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
640 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
641 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
642
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
643 // AMR trace
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
644 #define C_AMR_TRACE_ID 55
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
645
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
646 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
647 /* d_error_status */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
648 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
649
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
650 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
651 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
652
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
653 // masks to apply on d_error_status bit field
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
654 #define DSP_DEBUG_GSM_MASK 0x0000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
655 #define DSP_DEBUG_GPRS_MASK 0x0f3d
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
656 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
657
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
658 #elif (DSP == 35) // ROM Code GPRS AMR.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
659 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
660 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
661 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
662 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
663 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
664 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
665 #if (OP_RIV_AUDIO == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
666 #define L1_NEW_AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
667 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
668 // Available but not yet tuned with Riviera AUDIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
669 #define L1_NEW_AEC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
670 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
671 #if ((L1_NEW_AEC) && (!AEC))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
672 // First undef the flag to avoid warnings at compilation time
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
673 #undef AEC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
674 #define AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
675 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
676 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
677
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
678 #define FF_L1_TCH_VOCODER_CONTROL 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
679 #define L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
680
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
681 #define DSP_START 0x7000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
682
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
683 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
684
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
685 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
686 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
687
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
688 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
689
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
690 #if ( (CHIPSET != 12) && (CODE_VERSION == NOT_SIMULATION))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
691
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
692 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
693
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
694 // management.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
695
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
696 // DSP_IDLE3 is not supported in simulation
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
697
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
698 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
699 #define W_A_DSP_IDLE3 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
700 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
701
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
702 // DSP software work-around config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
703 // bit0 - Work-around to support CRTG.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
704 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
705 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
706 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
707 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
708 #define C_DSP_SW_WORK_AROUND 0x0006
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
709
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
710 #elif (ANLG_FAM == 2) // IOTA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
711 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
712
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
713 #elif (ANLG_FAM == 3) // SYREN
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
714 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
715
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
716 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
717
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
718 /* DSP debug trace configuration */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
719 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
720 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
721 // In case of the melody E2 the DSP trace must be disable because the
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
722 // melody instrument waves are overlayed with DSP trace buffer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
723
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
724 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
725 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
726 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
727
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
728 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
729 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
730 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
731 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
732
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
733 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
734 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
735 // Currently not supported !
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
736 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
737 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
738 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
739 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
740 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
741
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
742 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
743 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
744 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
745 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Timer + Buffer Header + Burst.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
746
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
747 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
748 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
749 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
750
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
751 // AMR trace
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
752 #define C_AMR_TRACE_ID 55
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
753
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
754 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
755 /* d_error_status */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
756 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
757
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
758 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
759 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
760
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
761 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
762 #define DSP_DEBUG_GSM_MASK 0x08BD
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
763 #define DSP_DEBUG_GPRS_MASK 0x0f3d
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
764 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
765 #elif (DSP == 36) // ROM Code GPRS AMR.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
766 #define CLKMOD1 0x4006 // ...
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
767 #define CLKMOD2 0x4116 // ...65 Mips pll free
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
768 #define CLKSTART 0x29 // ...65 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
769 #define C_PLL_CONFIG 0x154 // For VTCXO = 13 MHz and max DSP speed = 84.5 Mips
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
770 #define VOC FR_HR_EFR // FR + HR + EFR (normaly FR_EFR : PBs).
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
771 #define AEC 1 // AEC/NS not supported.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
772 #if (OP_RIV_AUDIO == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
773 #define L1_NEW_AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
774 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
775 // Available but not yet tuned with Riviera AUDIO
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
776 #define L1_NEW_AEC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
777 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
778 #if ((L1_NEW_AEC) && (!AEC))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
779 // First undef the flag to avoid warnings at compilation time
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
780 #undef AEC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
781 #define AEC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
782 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
783 #define MAP 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
784 #undef L1_AMR_NSYNC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
785 #define L1_AMR_NSYNC 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
786 #define FF_L1_TCH_VOCODER_CONTROL 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
787 #define L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
788
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
789 #define DSP_START 0x7000
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
790
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
791 #define INSTALL_ADD 0x7002 // Used to set gprs_install_address pointer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
792
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
793 #define W_A_DSP1 0 // Work Around correcting pb in DSP: SACCH
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
794 #define ULYSSE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
795
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
796 #define W_A_DSP_SR_BGD 1 // Work around about the DSP speech reco background task.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
797
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
798 #if ( (CHIPSET != 12) && (CODE_VERSION == NOT_SIMULATION))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
799
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
800 #define W_A_DSP_IDLE3 1 // Work around to report DSP state to the ARM for Deep Sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
801
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
802 // management.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
803
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
804 // DSP_IDLE3 is not supported in simulation
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
805
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
806 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
807 #define W_A_DSP_IDLE3 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
808 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
809
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
810 // DSP software work-around config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
811 // bit0 - Work-around to support CRTG.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
812 // bit1 - DMA reset on critical DMA still running cases, refer to REQ01260.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
813 // bit2 - Solve Read/Write BULDATA pointers Omega & Nausica issue, refer to BUG00650.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
814 // bit3 - Solve IBUFPTRx reset IOTA issue, refer to BUG01911.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
815 #if (ANLG_FAM == 1) // OMEGA / NAUSICA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
816 #define C_DSP_SW_WORK_AROUND 0x0006
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
817
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
818 #elif (ANLG_FAM == 2) // IOTA
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
819 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
820
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
821 #elif (ANLG_FAM == 3) // SYREN
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
822 #define C_DSP_SW_WORK_AROUND 0x000E
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
823 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
824
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
825 // This workaround should be enabled only for H2-sample on full build config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
826 #if (OP_L1_STANDALONE==1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
827 #define RAZ_VULSWITCH_REGAUDIO 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
828 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
829
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
830 /* DSP debug trace configuration */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
831 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
832 #if (MELODY_E2)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
833 // In case of the melody E2 the DSP trace must be disable because the
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
834 // melody instrument waves are overlayed with DSP trace buffer
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
835
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
836 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
837 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
838 #define C_DEBUG_BUFFER_SIZE 7 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
839
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
840 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
841 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
842 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
843 #define C_DEBUG_TRACE_TYPE 0x0000 // Level = BASIC; Features = Timer + Buffer Header + Burst.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
844
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
845 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
846 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
847 // Currently not supported !
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
848 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
849 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
850 // DSP debug trace API buufer config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
851 #define C_DEBUG_BUFFER_ADD 0x17ff // Address of DSP write pointer... data are just after.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
852 #define C_DEBUG_BUFFER_SIZE 2047 // Real size is incremented by 1 for DSP write pointer.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
853
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
854 // DSP debug trace type config
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
855 // |<-------------- Features -------------->|<---------- Levels ----------->|
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
856 // [15-8:UNUSED|7:TIMER|6:BURST|5:BUFFER|4:BUFFER HEADER|3:UNUSED|2:KERNEL|1:BASIC|0:ISR]
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
857 #define C_DEBUG_TRACE_TYPE 0x0012 // Level = BASIC; Features = Buffer Header.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
858
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
859 #if (C_DEBUG_TRACE_TYPE != 0) && ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
860 #define DSP_DEBUG_TRACE_ENABLE 1 // Enable DSP debug trace dumping capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
861 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
862
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
863 // AMR trace
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
864 #define C_AMR_TRACE_ID 55
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
865
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
866 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
867 /* d_error_status */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
868 /*-------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
869
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
870 #if ((TRACE_TYPE == 1) || (TRACE_TYPE == 4))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
871 #define D_ERROR_STATUS_TRACE_ENABLE 1 // Enable d_error_status checking capability (supported since patch 2090)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
872
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
873 // masks to apply on d_error_status bit field for DSP patch 0x2061 or 0x2062
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
874 #define DSP_DEBUG_GSM_MASK 0x08BD
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
875 #define DSP_DEBUG_GPRS_MASK 0x0f3d
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
876 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
877 #endif // DSP
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
878
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
879 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
880 /* Default value */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
881 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
882 #ifndef W_A_DSP1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
883 #define W_A_DSP1 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
884 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
885
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
886 #ifndef DATA14_4
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
887 #define DATA14_4 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
888 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
889
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
890 #ifndef W_A_ITFORCE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
891 #define W_A_ITFORCE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
892 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
893
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
894 #ifndef W_A_DSP_IDLE3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
895 #define W_A_DSP_IDLE3 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
896 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
897
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
898 #ifndef L1_NEW_AEC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
899 #define L1_NEW_AEC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
900 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
901
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
902 #ifndef DSP_DEBUG_TRACE_ENABLE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
903 #define DSP_DEBUG_TRACE_ENABLE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
904 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
905
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
906 #ifndef DEBUG_DEDIC_TCH_BLOCK_STAT
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
907 #define DEBUG_DEDIC_TCH_BLOCK_STAT 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
908 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
909
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
910 #ifndef D_ERROR_STATUS_TRACE_ENABLE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
911 #define D_ERROR_STATUS_TRACE_ENABLE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
912 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
913
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
914 #ifndef L1_GTT
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
915 #define L1_GTT 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
916 #define TTY_SYNC_MCU 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
917 #define TTY_SYNC_MCU_2 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
918 #define L1_GTT_FIFO_TEST_ATOMIC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
919 #define NEW_WKA_PATCH 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
920 #define OPTIMISED 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
921 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
922
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
923 #ifndef L1_AMR_NSYNC
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
924 #define L1_AMR_NSYNC 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
925 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
926
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
927 #ifndef FF_L1_TCH_VOCODER_CONTROL
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
928 #define FF_L1_TCH_VOCODER_CONTROL 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
929 #define L1M_WAIT_DSP_RESTART_AFTER_VOCODER_ENABLE 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
930 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
931
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
932 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
933 /* Download */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
934 /*------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
935
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
936
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
937 /* Possible values for the download status */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
938
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
939 #define LEAD_READY 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
940 #define BLOCK_READY 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
941 #define PROGRAM_DONE 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
942 #define PAGE_SELECTION 4
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
943
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
944
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
945 /************************************/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
946 /* Options of compilation... */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
947 /************************************/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
948
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
949 // Possible choice of hardware plateform.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
950 #define GEMINI 1 // GEMINI chip (rom dsp code)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
951 #define POLESTAR 2 // POLESTAR chip (no rom)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
952
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
953 // Possible choice for DSP software setup.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
954 #define NO_DWNLD 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
955 #define PATCH_DWNLD 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
956 #define DSP_DWNLD 2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
957 #define PATCH_DSP_DWNLD 3
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
958
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
959 // MAC-S status reporting to Layer 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
960 #define MACS_STATUS 0 // MAC-S STATUS activated if set to 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
961
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
962
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
963 // Possible choice for dll_dcch_downlink interface (with FN or without FN)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
964 #define SEND_FN_TO_L2_IN_DCCH 1 /* 0=without, 1=with FN parameter */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
965
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
966 //---------------------------------------------------------------------------------
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
967
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
968 // Neighbor Cell RXLEV indication
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
969 #if ((OP_L1_STANDALONE==1) && (CODE_VERSION == NOT_SIMULATION))
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
970 #define L1_MPHC_RXLEV_IND_REPORT_SORT 1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
971 #else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
972 #define L1_MPHC_RXLEV_IND_REPORT_SORT 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
973 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
974
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
975 #endif /* __L1_CONFG_H__ */