FreeCalypso > hg > fc-selenite

annotate src/cs/layer1/cfile/l1_small.c @ 83:92fde62400ef

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.../gcc/exceptions.S: added 2nd part that was missing in Citrine
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 20 Jul 2018 18:21:46 +0000
parents c56f1d6202f5
children bd1301884216
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b6a5e36de839 src/cs: initial import from Magnetite
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1
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2
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3 #include "l1sw.cfg"
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4 #if (OP_L1_STANDALONE == 0)
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5 #include "debug.cfg"
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6 #include "rv_swe.h"
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7 #endif
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8 #if (OP_L1_STANDALONE == 1)
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9 #include "general.h"
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10 #endif
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11 #include "l1_macro.h"
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12 #include "l1_confg.h"
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13
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14 #if (CODE_VERSION == SIMULATION)
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15 #include <string.h>
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16 #include "l1_types.h"
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17 #include "sys_types.h"
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18 #include "l1_const.h"
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19 #include "l1_time.h"
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20 #if TESTMODE
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21 #include "l1tm_defty.h"
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22 #endif
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23 #if (AUDIO_TASK == 1)
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24 #include "l1audio_const.h"
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25 #include "l1audio_cust.h"
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26 #include "l1audio_defty.h"
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27 #endif
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28 #if (L1_GTT == 1)
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29 #include "l1gtt_const.h"
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30 #include "l1gtt_defty.h"
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31 #endif
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32 #if (L1_MP3 == 1)
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33 #include "l1mp3_defty.h"
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34 #endif
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35 #if (L1_MIDI == 1)
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36 #include "l1midi_defty.h"
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37 #endif
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38 #if (L1_AAC == 1)
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39 #include "l1aac_defty.h"
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40 #endif
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41 #include "l1_defty.h"
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42 #include "l1_varex.h"
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43 #include "cust_os.h"
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44 #include "l1_msgty.h"
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45
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46 #include <stdio.h>
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47 #include "sim_cfg.h"
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48 #include "sim_cons.h"
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49 #include "sim_def.h"
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50 #include "sim_var.h"
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51
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52 #else
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53 #include <string.h>
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54
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55 #include "l1_types.h"
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56 #include "sys_types.h"
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57 #include "l1_const.h"
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58 #include "l1_time.h"
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59
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60 #if TESTMODE
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61 #include "l1tm_defty.h"
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62 #endif
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63 #if (AUDIO_TASK == 1)
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64 #include "l1audio_const.h"
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65 #include "l1audio_cust.h"
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66 #include "l1audio_defty.h"
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67 #endif
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68 #if (L1_GTT == 1)
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69 #include "l1gtt_const.h"
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70 #include "l1gtt_defty.h"
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71 #endif
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72 #if (L1_MP3 == 1)
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73 #include "l1mp3_defty.h"
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74 #endif
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75 #if (L1_MIDI == 1)
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76 #include "l1midi_defty.h"
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77 #endif
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78 #if (L1_AAC == 1)
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79 #include "l1aac_defty.h"
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80 #endif
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81 #include "l1_defty.h"
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82 #include "l1_varex.h"
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83 #include "cust_os.h"
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84 #include "l1_msgty.h"
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85 #include "tpudrv.h"
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86
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87 #endif
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88
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89 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
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90 #include "sys_memif.h"
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91 #endif
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92
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93 #if (CHIPSET == 15)
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94 #include "sys_inth.h"
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95 #include "bspI2c.h"
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96 #include "clkm.h"
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97
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98 // This could be removed if i2c_pwr_interface is functional
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99 extern volatile Bool bspI2c_busLocked[BSP_I2C_NUM_DEVICES] ;
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100 #endif
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101
48
c56f1d6202f5 l1_small.c: disable TMS470 assembly for gcc
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102 #ifndef __GNUC__
0
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103 /* NEW COMPILER MANAGEMENT
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104 * With compiler V3.00, the .text section must be explicitely
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105 * defined.
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106 * Else the following code will be put in the .cinit section.
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107 * The change is applied to all compilers.
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108 */
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109 asm(" .sect \".text\" ");
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110 #endif
0
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111
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112
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113 UWORD8 *mode_authorized = &(l1s.pw_mgr.mode_authorized);
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114 UWORD8 *switch_PWR_MNGT = &(l1_config.pwr_mngt);
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115
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116 #if (W_A_CALYPSO_BUG_01435 == 1)
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117
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118 asm("SMALL_SLEEP .equ 01h");
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119 asm("BIG_SLEEP .equ 02h");
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120 asm("DEEP_SLEEP .equ 03h");
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121
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122 void f_arm_sleep_cmd(UWORD8 d_sleep_mode)
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123 {
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124 asm(" LDR R3, MPU_FREE_REG");
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125
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126 // here below the C code:
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127 // if ((d_sleep_mode == SMALL_SLEEP) || (d_sleep_mode == BIG_SLEEP))
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128 // * (volatile UWORD16 *) 0xfffffd00 &= 0xfffe;
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129 // else
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130 // if (d_sleep_mode == DEEP_SLEEP)
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131 // * (volatile UWORD16 *) 0xfffffd00 &= 0xefff;
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diff changeset
132
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 asm(" CMP R0, #SMALL_SLEEP");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 asm(" BEQ Small_or_Big_Sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 asm(" CMP R0, #BIG_SLEEP");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 asm(" BEQ Small_or_Big_Sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 asm(" CMP R0, #DEEP_SLEEP");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 asm(" BXNE LR");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 asm("Deep_Sleep: ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 asm(" LDR R0, CLKM_CNTL_ARM_CLK_REG");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 asm(" LDRH R12, [R0, #0]");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 asm(" AND R1, R12, #255");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 asm(" AND R12, R12, #61184");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 asm(" ORR R12, R1, R12");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 asm(" STRH R12, [R0, #0]");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 asm(" STMIA R3!, {R4-R7}");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 asm(" B End_Sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 asm("Small_or_Big_Sleep: ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 asm(" LDR R12, CLKM_CNTL_ARM_CLK_REG");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 asm(" LDRH R0, [R12, #0]");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 asm(" MOV R0, R0, LSL #16");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 asm(" MOV R0, R0, LSR #17");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 asm(" MOV R0, R0, LSL #1");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156 asm(" STRH R0, [R12, #0]");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157 asm(" STMIA R3!, {R4-R7}");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 asm("End_Sleep: ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 } /* f_arm_sleep_cmd() */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 asm("MPU_FREE_REG .word 0xffffff20");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164 asm("CLKM_CNTL_ARM_CLK_REG .word 0xfffffd00");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167 #if (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168 void init_small_sleep()
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 {
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 /* Should not disable bridge_clk during small sleep when an I2C transaction is pending
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173 In Locosto without BRIDGE_CLK, I2C interrupt is not generated */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 // This could be removed if i2c_pwr_interface is functional
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 Uint8 sts=0, camera_sts = 0;
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179 sts=i2c_pwr_interface(0);
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180 #ifdef RVM_CAMD_SWE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181 #if(LOCOSTO_LITE == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 camera_sts = camera_pwr_interface(0);
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 if (sts != 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 #if(LOCOSTO_LITE == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 || camera_sts != 0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 )
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 {
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 sts=i2c_pwr_interface(2);//enable
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 *((volatile UINT16 *) CLKM_CNTL_CLK) &= ~CLKM_BRIDGE_DIS;
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 }
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 else
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 {
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 sts=i2c_pwr_interface(1);//disable
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 *((volatile UINT16 *) CLKM_CNTL_CLK) |= CLKM_BRIDGE_DIS;
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 F_INTH_ENABLE_ONE_IT(C_INTH_UART_WAKEUP_IT);
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 }
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 }
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 void exit_small_sleep()
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 {
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 i2c_pwr_interface(2);
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211 return;
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 }
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217 /*-------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 /* INT_Small_Sleep() */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 /*-------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220 /* */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 /* Description: small sleep */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 /* ------------ */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223 /* Called by TCT_Schedule main loop of Nucleus */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 /*-------------------------------------------------------*/
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225
48
c56f1d6202f5 l1_small.c: disable TMS470 assembly for gcc
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
226 #ifndef __GNUC__
0
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 asm(" .def INT_Small_Sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229 asm("INT_Small_Sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 /* NEW COMPILER MANAGEMENT
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
232 * _switch_PWR_MNGT and _mode_authorized must be .def and not .ref
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
233 * as they are both defined in this file.
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
234 */
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
235 asm(" .def _switch_PWR_MNGT ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
236 asm(" .def _mode_authorized ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
237 asm("SMALL_SLEEP .equ 01h ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
238 asm("ALL_SLEEP .equ 04h ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
239 asm("PWR_MNGT .equ 01h ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
240 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
241 // This code log the number of time the Small sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
242 // function has been invoked
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
243 #if (TI_PROFILER == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
244 asm(" ldr r0, profiler_counter "); // pick counter
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
245 asm(" mov r1,#0 ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
246 asm(" str r1,[r0] ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
247 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
248
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
249 #if (TI_NUC_MONITOR == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
250 // Push registers on statck because R3 and R4 must not be modified
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
251 asm(" STMFD sp!,{r0-r5}");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
252 asm(" .global _ti_nuc_monitor_sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
253 asm(" BL _ti_nuc_monitor_sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
254 asm(" LDMFD sp!,{r0-r5}");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
255 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
256 // End log call
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
257 #endif // OP_L1_STANDALONE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
258 //asm(" .ref TCT_Schedule_Loop ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
259 //asm(" B TCT_Schedule_Loop ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
260
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
261 asm(" ldr r0,Switch "); // pick up sleep mode
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
262 asm(" ldr r0,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
263 asm(" ldrb r1,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
264 asm(" cmp r1,#PWR_MNGT "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
265 asm(" bne End_small_sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
266
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
267 asm(" ldr r0,Mode "); // pick up sleep mode
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
268 asm(" ldr r0,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
269 asm(" ldrb r1,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
270 asm(" cmp r1,#SMALL_SLEEP "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
271 asm(" beq Small_sleep_ok ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
272 asm(" cmp r1,#ALL_SLEEP "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
273 asm(" bne End_small_sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
274
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
275 asm("Small_sleep_ok ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
276
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
277 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
278 // CQ19599: For Calypso+ chipset, extended page mode
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
279 // shall be disabled before entering deep sleep and
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
280 // restored at wake up
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
281 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
282 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
283 asm(" .ref _f_memif_extended_page_mode_read_bit ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
284 asm(" .ref _f_memif_extended_page_mode_disable ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
285
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
286 asm(" BL _f_memif_extended_page_mode_read_bit"); //read state of extended page mode
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
287 asm(" STMFD sp!,{r2}"); //save r2 in stack in case it was used before
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
288 asm(" MOV r2,r0"); //store the state in r2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
289 asm(" BL _f_memif_extended_page_mode_disable"); //disable extended page mode
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
290 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
291
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
292 #if (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
293 //// Disable IRQs
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
294 asm(" MRS r1, CPSR ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
295 // asm(" MOV r2,r1"); // Copy the contents on CPSR register to r2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
296 asm(" STMFD sp!,{r1}"); // Push r2 in the stack
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
297 asm(" ORR r1,r1,#00c0h "); // Disable IRQs
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
298 asm(" MSR CPSR,r1 ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
299
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
300 asm(" .ref _init_small_sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
301 asm(" BL _init_small_sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
302 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
303
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
304 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
305 //reset the DEEP_SLEEP bit 12 of CNTL_ARM_CLK register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
306 // (Cf BUG_1278)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
307 asm(" ldr r0,addrCLKM "); // pick up CNTL_ARM_CLK register address
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
308 asm(" ldrh r1,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
309 asm(" orr r1,r1,#1000h "); // reset the bit
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
310 asm(" strh r1,[r0] "); //store the result
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
311
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
312 asm(" ldr r0,addrCLKM "); // pick up CLKM clock register address
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
313 asm(" ldrh r1,[r0] "); // take the current value of the register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
314 asm(" bic r1,r1,#1 "); // disable ARM clock
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
315 asm(" strh r1,[r0] ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
316 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
317
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
318 #if (CHIPSET == 15)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
319 asm(" .ref _exit_small_sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
320 asm(" BL _exit_small_sleep");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
321 //Enable IRQs
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
322 asm(" LDMFD sp!,{r1}"); //restore r2 from stack
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
323 //asm(" MOV r1,r2"); // Move r2 to r1
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
324 asm(" MSR CPSR,r1 "); // Copy the contents of r1 to CPSR register
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
325 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
326
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
327 #if (W_A_CALYPSO_BUG_01435 == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
328 asm(" MOV R0, #SMALL_SLEEP");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
329 asm(" BL _f_arm_sleep_cmd");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
330 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
331
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
332 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
333 // CQ19599: For Calypso+ chipset, restore the extended
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
334 // page mode if it was enabled before entering sleep
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
335 // *****************************************************
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
336 #if (W_A_CALYPSO_PLUS_SPR_19599 == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
337 asm(" .ref _f_memif_extended_page_mode_enable ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
338 asm(" CMP r2,#0"); //check if extended page mode was enabled
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
339 asm(" BEQ extended_page_mode_restored "); //if not, do nothing
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
340 asm(" BL _f_memif_extended_page_mode_enable"); //else restore it
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
341 asm("extended_page_mode_restored ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
342 asm(" LDMFD sp!,{r2}"); //restore r2
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
343 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
344
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
345 asm(" .ref TCT_Schedule_Loop ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
346 asm("End_small_sleep ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
347 asm(" B TCT_Schedule_Loop "); // Return to TCT_Schedule main loop
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
348
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
349 asm("addrCLKM .word 0xfffffd00 ");//CLKM clock register address
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
350
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
351 asm("Mode .word _mode_authorized ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
352 asm("Switch .word _switch_PWR_MNGT ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
353 #if (OP_L1_STANDALONE == 0)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
354 #if (TI_PROFILER == 1)
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
355 asm(" .ref _ti_profiler_nb_sleep_call ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
356 asm("profiler_counter .word _ti_profiler_nb_sleep_call ");
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
357 #endif
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
358 #endif // OP_L1_STANDALONE
b6a5e36de839 src/cs: initial import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
359
48
c56f1d6202f5 l1_small.c: disable TMS470 assembly for gcc
Mychaela Falconia <falcon@freecalypso.org>
parents: 0
diff changeset
360 #endif /* __GNUC__ */