FreeCalypso > hg > fc-selenite
annotate src/g23m-gprs/cci/cci_hw_sim.c @ 172:a0f935d68377
targets: gtm900 added
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Wed, 19 Jun 2019 04:38:43 +0000 |
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : |
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4 | Modul : cci_hw_sim.c |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This module implements hardware simulation functions for |
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18 | entity CCI. |
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19 +----------------------------------------------------------------------------- |
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20 */ |
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21 |
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22 |
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23 #define CCI_HW_SIM_C |
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24 |
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25 #define ENTITY_LLC |
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26 |
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27 /*==== INCLUDES =============================================================*/ |
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28 #include <string.h> /* to get memmove */ |
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29 |
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30 #include "typedefs.h" /* to get Condat data types */ |
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31 #include "vsi.h" /* to get a lot of macros */ |
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32 #include "macdef.h" |
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33 #include "gprs.h" |
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34 #include "gsm.h" /* to get a lot of macros */ |
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35 #include "cnf_llc.h" /* to get cnf-definitions */ |
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36 #include "mon_llc.h" /* to get mon-definitions */ |
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37 #include "prim.h" /* to get the definitions of used SAP and directions */ |
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38 #include "cci.h" /* to get the global entity definitions */ |
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39 #include "llc.h" /* to get the global entity definitions */ |
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40 |
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41 #include "cci_hw_sim.h" |
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42 |
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43 #include "llc_f.h" /* to get llc_build_crc24() */ |
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44 |
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45 /*==== CONST ================================================================*/ |
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46 |
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47 /*==== LOCAL VARS ===========================================================*/ |
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48 |
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49 /*==== PRIVATE FUNCTIONS ====================================================*/ |
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50 |
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51 /*==== PUBLIC FUNCTIONS =====================================================*/ |
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52 |
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53 #ifdef _GEA_SIMULATION_ |
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54 |
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55 |
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56 /* |
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57 +------------------------------------------------------------------------------ |
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58 | Function : ciph_hw_sim_cipher |
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59 +------------------------------------------------------------------------------ |
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60 | Description : This functionn simulates the hardware during ciphering process |
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61 | |
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62 | Parameters : void |
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63 | |
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64 +------------------------------------------------------------------------------ |
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65 */ |
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66 GLOBAL void ciph_hw_sim_cipher (U16 len) |
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67 { |
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68 /* |
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69 * first move data one byte, if requested |
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70 */ |
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71 |
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72 if( *cci_data->fbs.conf_ul_reg1 & INPUT_SHIFT ) |
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73 { |
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74 memmove (cci_data->fbs.simulated_reg_buffer, /* dest */ |
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75 cci_data->fbs.simulated_reg_buffer+1, /* src */ |
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76 len); |
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77 } |
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78 |
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79 { |
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80 #ifdef _SIM_CALC_FCS_ |
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81 ULONG fcs; |
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82 |
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83 /* |
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84 * Build FCS (function returns already inversed CRC), store result in fcs. |
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85 */ |
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86 fcs = llc_build_crc24 (cci_data->fbs.simulated_reg_buffer, |
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87 len); |
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88 /* |
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89 * Copy FCS to HW registers, taking byte ordering of FCS registers |
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90 * into account, e.g.: |
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91 * fcs reg1 reg2 |
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92 * xx 36 29 FC -> 29 FC xx 36 |
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93 */ |
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94 *cci_data->fbs.fcs_ul_reg1 = (USHORT) (fcs & 0x0000FFFFL); |
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95 *cci_data->fbs.fcs_ul_reg2 = (USHORT)((fcs & 0x00FF0000L) >> 16); |
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96 #else |
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97 /* |
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98 * Set FCS to all zeroes in simulation. |
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99 */ |
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100 *cci_data->fbs.fcs_ul_reg1 = 0x0000; |
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101 *cci_data->fbs.fcs_ul_reg2 = 0x0000; |
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102 #endif /* _SIM_CALC_FCS_ */ |
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103 } |
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104 /* |
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105 * HW simulation: set status register to indicate finished work and emulate |
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106 * timer afterwards. |
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107 */ |
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108 *cci_data->fbs.status_reg &= NOT_WORKING; |
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109 |
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110 } /* ciph_hw_sim_cipher */ |
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111 |
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112 /* |
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113 +------------------------------------------------------------------------------ |
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114 | Function : ciph_hw_sim_decipher |
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115 +------------------------------------------------------------------------------ |
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116 | Description : This functionn simulates the hardware during deciphering process |
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117 | |
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118 | Parameters : void |
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119 | |
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120 +------------------------------------------------------------------------------ |
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121 */ |
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122 GLOBAL void ciph_hw_sim_decipher ( void ) |
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123 { |
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124 /* |
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125 * set all registers to indicate finished work. |
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126 * FCS will be checked later. |
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127 */ |
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128 *cci_data->fbs.fcs_dl_reg1 &= 0x0000; |
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129 *cci_data->fbs.fcs_dl_reg2 &= 0x0000; |
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130 |
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131 *cci_data->fbs.status_reg &= NOT_WORKING; |
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132 |
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133 } /* ciph_hw_sim_decipher */ |
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134 |
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135 |
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136 |
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137 /* |
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138 +------------------------------------------------------------------------------ |
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139 | Function : ciph_reg16_write_sim |
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140 +------------------------------------------------------------------------------ |
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141 | Description : This function simulates the hardware writing process on windows |
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142 | environment |
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143 | |
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144 | Parameters : void |
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145 | |
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146 +------------------------------------------------------------------------------ |
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147 */ |
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148 GLOBAL void ciph_reg16_write_sim ( void ) |
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149 { |
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150 UBYTE *data = (UBYTE *)cci_data->fbs.data16_reg;; |
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151 |
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152 /* |
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153 * To support any alignment the copy process must be done in two steps |
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154 * by the use of 8 bit char pointers |
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155 */ |
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156 *cci_data->fbs.simulated_reg = *data; |
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157 cci_data->fbs.simulated_reg++; |
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158 |
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159 data++; |
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160 |
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161 *cci_data->fbs.simulated_reg = *data; |
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162 cci_data->fbs.simulated_reg++; |
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163 |
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164 } /* ciph_reg16_write_sim */ |
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165 |
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166 |
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167 |
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168 |
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169 /* |
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170 +------------------------------------------------------------------------------ |
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171 | Function : ciph_reg8_write_sim |
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172 +------------------------------------------------------------------------------ |
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173 | Description : This function simulates the 8 bit hardware writing process |
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174 | by the use of 8 bit register. |
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175 | |
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176 | Parameters : void |
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177 | |
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178 +------------------------------------------------------------------------------ |
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179 */ |
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180 GLOBAL void ciph_reg8_write_sim ( void ) |
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181 { |
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182 *cci_data->fbs.simulated_reg = *cci_data->fbs.data8_reg; |
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183 cci_data->fbs.simulated_reg++; |
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184 |
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185 } /* ciph_reg8_write_sim() */ |
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186 |
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187 |
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188 /* |
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189 +------------------------------------------------------------------------------ |
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190 | Function : ciph_reg16_read_sim |
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191 +------------------------------------------------------------------------------ |
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192 | Description : This function simulates the 16 bit hardware reading process |
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193 | by the use of a 16 bit register |
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194 | |
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195 | Parameters : void |
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196 | |
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|
197 +------------------------------------------------------------------------------ |
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|
198 */ |
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|
199 GLOBAL void ciph_reg16_read_sim ( void ) |
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200 { |
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201 UBYTE *data = (UBYTE *)cci_data->fbs.data16_reg; |
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202 |
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|
203 /* |
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204 * To support any alignment the copy process must be done in two steps |
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205 * by the use of 8 bit char pointers |
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|
206 */ |
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207 *data = *cci_data->fbs.simulated_reg; |
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208 cci_data->fbs.simulated_reg++; |
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209 |
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|
210 data++; |
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|
211 |
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212 *data = *cci_data->fbs.simulated_reg; |
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213 cci_data->fbs.simulated_reg++; |
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214 |
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215 } /* ciph_reg16_read_sim*/ |
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|
216 |
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217 |
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|
218 /* |
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|
219 +------------------------------------------------------------------------------ |
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|
220 | Function : ciph_reg8_read_sim |
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|
221 +------------------------------------------------------------------------------ |
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|
222 | Description : This function simulates the 8 bit hardware reading process |
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223 | by the use of 8 bit register. |
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|
224 | |
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|
225 | Parameters : void |
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|
226 | |
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|
227 +------------------------------------------------------------------------------ |
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|
228 */ |
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|
229 GLOBAL void ciph_reg8_read_sim ( void ) |
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|
230 { |
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|
231 *cci_data->fbs.data8_reg = *cci_data->fbs.simulated_reg; |
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|
232 cci_data->fbs.simulated_reg++; |
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|
233 |
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|
234 } /* ciph_reg8_read_sim*/ |
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|
235 |
d393cd9bb723
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|
236 |
d393cd9bb723
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|
237 |
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|
238 #endif /* _GEA_SIMULATION */ |