FreeCalypso > hg > fc-selenite
annotate src/cs/drivers/drv_app/lcc/lcc_tm_i.h @ 92:e42d528f3e6e
components/main_ir: ramvecs module now goes outside of libs
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 21 Jul 2018 00:22:35 +0000 |
parents | b6a5e36de839 |
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rev | line source |
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1 /****************************************************************************** |
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2 * Power Task (pwr) |
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3 * Design and coding by Svend Kristian Lindholm, skl@ti.com |
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4 * |
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5 * PWR ETM interface |
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6 * |
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7 * $Id: pwr_tm_i.h 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $ |
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8 * |
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9 ******************************************************************************/ |
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10 |
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11 #ifndef _LCC_TM_I_H_ |
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12 #define _LCC_TM_I_H_ |
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13 |
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14 #define PWR_CFG_ID_SIZE 2 |
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15 #define PWR_COMMON_CFG_SIZE 14 |
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16 #define PWR_BAT_CFG_SIZE 36 |
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17 #define PWR_TEMP_CFG_SIZE 72 |
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18 #define PWR_MMI_CFG_SIZE 2 |
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19 #define PWR_CHG_CFG_SIZE 8 |
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20 #define PWR_I2V_CAL_SIZE 6 |
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21 #define PWR_VBAT_CAL_SIZE 6 |
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22 #define PWR_DYNAMIC_SIZE 1 |
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23 #define PWR_TMASK_SIZE 4 |
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24 |
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25 // This enumeration should be shared with the PC test mode side |
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26 enum { |
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27 PWR_CFG_ID = 0, |
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28 PWR_COMMON, |
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29 PWR_CHG, |
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30 PWR_BAT, |
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31 PWR_TEMP, |
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32 PWR_MMI, |
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33 PWR_I2V_CAL = 10, |
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34 PWR_VBAT_CAL, |
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35 PWR_MMI_TEST = 15, |
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36 PWR_DYNAMIC = 20, |
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37 PWR_TRACE_MASK= 21 |
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38 } ; |
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39 |
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40 // Test mode indication mail sent to ETM |
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41 // NOTE: Also used as request mail |
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42 struct etm_tm_ind_s { |
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43 T_RV_HDR header; |
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44 uint8 size; |
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45 uint8 status; |
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46 uint8 data[127]; |
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47 }; |
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48 |
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49 typedef struct etm_tm_ind_s T_ETM_TM_IND; // Use same buffer in both directions |
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50 |
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51 #endif //_LCC_TM_I_H_ |