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annotate src/cs/system/main/gcc/irq_twiddle.S @ 117:e67bbb9b1fb9

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src/cs sync with Magnetite: C155 support
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 07 Nov 2018 06:03:02 +0000
parents 95ef11e76c5b
children
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95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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1 /*
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2 * TI's L1 code (and possibly other parts of the software suite) calls
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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3 * functions named INT_DisableIRQ() and INT_EnableIRQ(); in TI's original
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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4 * fw they are implemented (in a very ugly manner, as usual) in the
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
Mychaela Falconia <falcon@freecalypso.org>
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5 * int.s entry point assembly module. Here we implement the same
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
Mychaela Falconia <falcon@freecalypso.org>
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6 * functions in a cleaner way.
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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7 */
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9 #include "asm_defs.h"
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11 .code 32
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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12 .text
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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14 .globl INT_DisableIRQ
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15 INT_DisableIRQ:
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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16 mrs r0, CPSR
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17 orr r0, r0, #LOCKOUT
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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18 msr CPSR, r0
95ef11e76c5b src/cs/system/main/gcc: asm code pieced from Citrine
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19 bx lr
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21 .globl INT_EnableIRQ
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22 INT_EnableIRQ:
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23 mrs r0, CPSR
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24 bic r0, r0, #LOCKOUT
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25 msr CPSR, r0
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26 bx lr