FreeCalypso > hg > fc-selenite

annotate gcc/ld-script.src @ 112:fdecfb3bd860

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.../drv_app/r2d/r2d_*.c: LCD include case fixes from Magnetite R2D is not used in Selenite, but we strive to keep the two source trees in sync as much as possible to reduce the diffs.
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 13 Oct 2018 16:56:22 +0000
parents 80e3a78126ac
children 16703b3fb211
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1 dnl This ld script source is fed through m4 in order to fill in
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2 dnl those settings which depend on the configuration.
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3 dnl Two include files are fed to m4 before this main body:
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4 dnl the appropriate targets/*.m4 file defining the memory config
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5 dnl of the hardware, and one of flash.m4 or xram.m4 to select
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6 dnl the build type.
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7
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8 /*
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9 * FreeCalypso Selenite ld script for the Buildmem build
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10 */
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11
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12 ENTRY(_Firmware_boot_entry)
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13
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14 MEMORY {
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15 ifelse(Buildmem-FLASH_BOOT_VIA_BOOTROM,FLASH-1,
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16 ` FLASH_OVERLAY : ORIGIN = 0, LENGTH = 0x2000')
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17 ifelse(Buildmem,FLASH,
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18 ` FLASH : ORIGIN = FLASHIMAGE_BASE_ADDR,
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19 LENGTH = CONFIG_FWFLASH_SIZE - FLASHIMAGE_BASE_ADDR')
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20 IRAM : ORIGIN = 0x00800000, LENGTH = CONFIG_IRAM_SIZE
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21 XRAM : ORIGIN = 0x01000000, LENGTH = CONFIG_XRAM_SIZE
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22 }
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23
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24 SECTIONS {
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25 dnl The following sections exist only in the flashImage build,
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26 dnl and only on targets that use the Calypso boot ROM.
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27 ifelse(Buildmem-FLASH_BOOT_VIA_BOOTROM,FLASH-1,
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28 ` /* Part of flash overlaid by the boot ROM */
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29 bootrom.overlay 0 : {
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30 *(bootrom.overlay)
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31 } > FLASH_OVERLAY
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32
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33 /* code that enables the boot ROM and jumps to it */
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34 bootrom.switch : {
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35 *(bootrom.switch)
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36 } > IRAM AT> FLASH_OVERLAY
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37 __romswitch_ram_addr = ADDR(bootrom.switch);
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38 __romswitch_flash_addr = LOADADDR(bootrom.switch);
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39 __romswitch_size = SIZEOF(bootrom.switch);
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40 ')dnl
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41
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42 define(`INTTEXT_BASE_ADDR',
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43 ifelse(Buildmem,FLASH,FLASHIMAGE_BASE_ADDR,`/* no fixed address */'))dnl
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44
82
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45 /* boot entry code, going into flash or XRAM emulating flash */
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46 .inttext INTTEXT_BASE_ADDR : {
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47 *(.inttext)
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48 } > Buildmem
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49
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50 /* copy-to-IRAM code */
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51 iram.text 0x80001C : {
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52 /* the 7 exception and interrupt vectors @ 0x80001C */
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53 *(.ramvecs)
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54 *_ir.a:(.text*)
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55 *_int.a:(.text*)
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56 *_intram.a:(.text*)
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57 *osx_na7_db.a:(.text*)
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58 *tpudrv.a:(.text*)
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59 *drivers_flash.a:niq32.o(.text*)
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60 *sim_drv.a:sim32.o(.text*)
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61 *libc.a:(.text*)
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62 *libgcc.a:(.text*)
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63 } > IRAM Put_in_flash
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64 ifelse(Buildmem,FLASH,
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65 ` __iramtext_ram_addr = ADDR(iram.text);
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66 __iramtext_flash_addr = LOADADDR(iram.text);
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67 __iramtext_size = SIZEOF(iram.text);
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68 ')dnl
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69
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70 /* XIP code, going into flash or XRAM emulating flash */
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71 xip.text : {
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72 *(.text*)
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73 /* let's put the ARM->Thumb veneers in the XIP section */
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74 *(.glue_7)
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75 } > Buildmem
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76
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77 /* all .rodata will stay in flash */
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78 .rodata : {
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79 *(.rodata*)
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80 } > Buildmem
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81
97
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82 .bss_dar (NOLOAD) : {
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83 *dar_gbl_var.a:(.bss* COMMON)
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84 } > XRAM
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85
82
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86 /*
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87 * All .data will go into XRAM.
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88 * For the flash build we'll have a step that copies
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89 * the .data section from flash to XRAM; for the RAM-only
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90 * build it goes directly into XRAM and stays there.
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91 */
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92 .data : {
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93 *(.data*)
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94 } > XRAM Put_in_flash
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95 ifelse(Buildmem,FLASH,
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96 ` __initdata_ram_addr = ADDR(.data);
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97 __initdata_flash_addr = LOADADDR(.data);
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98 __initdata_size = SIZEOF(.data);
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99 ')dnl
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100
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101 /* we have two kinds of BSS: internal and external */
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102 int.bss (NOLOAD) : {
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103 *(.l1s_global)
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104 *_ir.a:(.bss* COMMON)
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105 *_int.a:(.bss* COMMON)
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106 *_intram.a:(.bss* COMMON)
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107 *osx_na7_db.a:(.bss* COMMON)
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108 *tpudrv.a:(.bss* COMMON)
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109 *libc.a:(.bss* COMMON)
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110 *libgcc.a:(.bss* COMMON)
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111 *(.API_HISR_stack)
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112 . = ALIGN(4);
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113 } > IRAM
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114 __intbss_start = ADDR(int.bss);
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115 __intbss_size = SIZEOF(int.bss);
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116
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117 ext.bss (NOLOAD) : {
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118 *(.bss* COMMON)
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119 . = ALIGN(4);
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120 } > XRAM
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121 __extbss_start = ADDR(ext.bss);
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122 __extbss_size = SIZEOF(ext.bss);
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123
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124 int.stack (NOLOAD) : ALIGN(8) {
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125 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
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126 _Stack_segment_start = .;
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127 . += 0xB00;
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128 _Stack_segment_end = .;
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129
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130 _iram_end = .;
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131 } > IRAM
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132
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133 ext.stack (NOLOAD) : ALIGN(8) {
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134 /* Stack for abort and/or undefined modes. */
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135 . += 512;
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136 _Except_Stack_SP = .;
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137
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138 /* Leave 38 32bit words for state saving on exceptions. */
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139 xdump_buffer = .;
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140 . += 38 * 4;
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141
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142 _xram_end = .;
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143 } > XRAM
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144 }