FreeCalypso > hg > fc-selenite
comparison src/cs/drivers/drv_app/ffs/board/intelsbdrv.c @ 72:4484ab3f6ab3
FFS interrupt voodoo: made original TMS470 approach work with gcc
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 20 Jul 2018 03:35:25 +0000 |
parents | 559a8b3ef10b |
children |
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71:8019491a67a9 | 72:4484ab3f6ab3 |
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11 #include "ffs.cfg" | 11 #include "ffs.cfg" |
12 | 12 |
13 #include "ffs/ffs.h" | 13 #include "ffs/ffs.h" |
14 #include "ffs/board/drv.h" | 14 #include "ffs/board/drv.h" |
15 #include "ffs/board/ffstrace.h" | 15 #include "ffs/board/ffstrace.h" |
16 #include "nucleus.h" | |
17 | 16 |
18 | 17 |
19 #define INTEL_UNLOCK_SLOW 1 | 18 #define INTEL_UNLOCK_SLOW 1 |
20 | 19 |
21 | 20 |
224 | 223 |
225 /****************************************************************************** | 224 /****************************************************************************** |
226 * Interrupt Enable/Disable | 225 * Interrupt Enable/Disable |
227 ******************************************************************************/ | 226 ******************************************************************************/ |
228 | 227 |
229 uint32 intel_int_disable(void) | 228 #ifdef __GNUC__ |
230 { | 229 #define NOINLINE __attribute__ ((noinline)) |
231 #ifdef __GNUC__ | 230 #else |
232 return NU_Control_Interrupts(0xC0); | 231 #define NOINLINE |
232 #endif | |
233 | |
234 uint32 NOINLINE intel_int_disable(void) | |
235 { | |
236 #ifdef __GNUC__ | |
237 asm(" .code 16"); | |
233 #else | 238 #else |
234 asm(" .state16"); | 239 asm(" .state16"); |
240 #endif | |
235 asm(" mov A1, #0xC0"); | 241 asm(" mov A1, #0xC0"); |
236 asm(" ldr A2, tct_intel_disable"); | 242 asm(" ldr A2, tct_intel_disable"); |
237 asm(" bx A2 "); | 243 asm(" bx A2 "); |
238 | 244 |
245 #ifdef __GNUC__ | |
246 asm(".balign 4"); | |
247 asm("tct_intel_disable:"); | |
248 asm(" .word TCT_Control_Interrupts"); | |
249 #else | |
239 asm("tct_intel_disable .field _TCT_Control_Interrupts+0,32"); | 250 asm("tct_intel_disable .field _TCT_Control_Interrupts+0,32"); |
240 asm(" .global _TCT_Control_Interrupts"); | 251 asm(" .global _TCT_Control_Interrupts"); |
241 #endif | 252 #endif |
242 } | 253 } |
243 | 254 |
244 void intel_int_enable(uint32 cpsr) | 255 void NOINLINE intel_int_enable(uint32 cpsr) |
245 { | 256 { |
246 #ifdef __GNUC__ | 257 #ifdef __GNUC__ |
247 return NU_Control_Interrupts(cpsr); | 258 asm(" .code 16"); |
248 #else | 259 #else |
249 asm(" .state16"); | 260 asm(" .state16"); |
261 #endif | |
250 asm(" ldr A2, tct_intel_enable"); | 262 asm(" ldr A2, tct_intel_enable"); |
251 asm(" bx A2 "); | 263 asm(" bx A2 "); |
252 | 264 |
265 #ifdef __GNUC__ | |
266 asm(".balign 4"); | |
267 asm("tct_intel_enable:"); | |
268 asm(" .word TCT_Control_Interrupts"); | |
269 #else | |
253 asm("tct_intel_enable .field _TCT_Control_Interrupts+0,32"); | 270 asm("tct_intel_enable .field _TCT_Control_Interrupts+0,32"); |
254 asm(" .global _TCT_Control_Interrupts"); | 271 asm(" .global _TCT_Control_Interrupts"); |
255 #endif | 272 #endif |
256 } | 273 } |
257 | 274 |