FreeCalypso > hg > fc-selenite
comparison src/cs/drivers/drv_app/ffs/board/amdsbdrv.c @ 46:559a8b3ef10b
FFS code: first attempt at non-invasive gcc support
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 19 Jul 2018 00:35:33 +0000 |
parents | b6a5e36de839 |
children | 4484ab3f6ab3 |
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45:e955d102e7c4 | 46:559a8b3ef10b |
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11 #include "ffs.cfg" | 11 #include "ffs.cfg" |
12 | 12 |
13 #include "ffs/ffs.h" | 13 #include "ffs/ffs.h" |
14 #include "ffs/board/drv.h" | 14 #include "ffs/board/drv.h" |
15 #include "ffs/board/ffstrace.h" | 15 #include "ffs/board/ffstrace.h" |
16 #include "nucleus.h" | |
16 | 17 |
17 | 18 |
18 // Due to long branches, we disable all tracing and led function calls. | 19 // Due to long branches, we disable all tracing and led function calls. |
19 #undef tlw | 20 #undef tlw |
20 #define tlw(contents) | 21 #define tlw(contents) |
21 #undef ttw | 22 #undef ttw |
22 #define ttw(contents) | 23 #define ttw(contents) |
23 | 24 |
24 | 25 |
26 #ifdef __GNUC__ | |
27 asm(".globl ffsdrv_ram_amd_begin"); | |
28 asm("ffsdrv_ram_amd_begin:"); | |
29 #else | |
25 asm(" .label _ffsdrv_ram_amd_begin"); | 30 asm(" .label _ffsdrv_ram_amd_begin"); |
26 asm(" .def _ffsdrv_ram_amd_begin"); | 31 asm(" .def _ffsdrv_ram_amd_begin"); |
32 #endif | |
27 | 33 |
28 | 34 |
29 // IMPORTANT! Apparently, placing the int_disable/enable() function code | 35 // IMPORTANT! Apparently, placing the int_disable/enable() function code |
30 // here instead of at the bottom of the file, makes the code crash or | 36 // here instead of at the bottom of the file, makes the code crash or |
31 // freeze. Reason is as of yet unknown. | 37 // freeze. Reason is as of yet unknown. |
136 * Interrupt Enable/Disable | 142 * Interrupt Enable/Disable |
137 ******************************************************************************/ | 143 ******************************************************************************/ |
138 | 144 |
139 uint32 amd_int_disable(void) | 145 uint32 amd_int_disable(void) |
140 { | 146 { |
147 #ifdef __GNUC__ | |
148 return NU_Control_Interrupts(0xC0); | |
149 #else | |
141 asm(" .state16"); | 150 asm(" .state16"); |
142 asm(" mov A1, #0xC0"); | 151 asm(" mov A1, #0xC0"); |
143 asm(" ldr A2, tct_amd_disable"); | 152 asm(" ldr A2, tct_amd_disable"); |
144 asm(" bx A2 "); | 153 asm(" bx A2 "); |
145 | 154 |
146 asm("tct_amd_disable .field _TCT_Control_Interrupts+0,32"); | 155 asm("tct_amd_disable .field _TCT_Control_Interrupts+0,32"); |
147 asm(" .global _TCT_Control_Interrupts"); | 156 asm(" .global _TCT_Control_Interrupts"); |
157 #endif | |
148 } | 158 } |
149 | 159 |
150 void amd_int_enable(uint32 cpsr) | 160 void amd_int_enable(uint32 cpsr) |
151 { | 161 { |
162 #ifdef __GNUC__ | |
163 return NU_Control_Interrupts(cpsr); | |
164 #else | |
152 asm(" .state16"); | 165 asm(" .state16"); |
153 asm(" ldr A2, tct_amd_enable"); | 166 asm(" ldr A2, tct_amd_enable"); |
154 asm(" bx A2 "); | 167 asm(" bx A2 "); |
155 | 168 |
156 asm("tct_amd_enable .field _TCT_Control_Interrupts+0,32"); | 169 asm("tct_amd_enable .field _TCT_Control_Interrupts+0,32"); |
157 asm(" .global _TCT_Control_Interrupts"); | 170 asm(" .global _TCT_Control_Interrupts"); |
171 #endif | |
158 } | 172 } |
159 | 173 |
160 // Even though we have this end label, we cannot determine the number of | 174 // Even though we have this end label, we cannot determine the number of |
161 // constant/PC-relative data following the code! | 175 // constant/PC-relative data following the code! |
176 #ifdef __GNUC__ | |
177 asm(".globl ffsdrv_ram_amd_end"); | |
178 asm("ffsdrv_ram_amd_end:"); | |
179 #else | |
162 asm(" .state32"); | 180 asm(" .state32"); |
163 asm(" .label _ffsdrv_ram_amd_end"); | 181 asm(" .label _ffsdrv_ram_amd_end"); |
164 asm(" .def _ffsdrv_ram_amd_end"); | 182 asm(" .def _ffsdrv_ram_amd_end"); |
183 #endif |