FreeCalypso > hg > fc-selenite
comparison src/cs/drivers/drv_core/armio/armio.c @ 0:b6a5e36de839
src/cs: initial import from Magnetite
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sun, 15 Jul 2018 04:39:26 +0000 |
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children | e67bbb9b1fb9 |
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-1:000000000000 | 0:b6a5e36de839 |
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1 /* | |
2 * ARMIO.C | |
3 * | |
4 * | |
5 * Control diagnostic bits | |
6 * | |
7 * Reference : GCS207 | |
8 * | |
9 */ | |
10 | |
11 | |
12 #include "l1sw.cfg" | |
13 #include "swconfig.cfg" | |
14 #ifdef BLUETOOTH_INCLUDED | |
15 #include "btemobile.cfg" | |
16 #endif | |
17 #if (OP_L1_STANDALONE == 1) | |
18 #include "l1_macro.h" | |
19 #include "l1_confg.h" | |
20 #endif | |
21 #include "board.cfg" | |
22 #include "chipset.cfg" | |
23 #include "fc-target.cfg" | |
24 | |
25 #if (OP_L1_STANDALONE == 0) | |
26 #include "main/sys_types.h" | |
27 #else | |
28 #include "sys_types.h" | |
29 #endif | |
30 | |
31 | |
32 #include "memif/mem.h" | |
33 | |
34 #include "inth/iq.h" | |
35 #include "armio/armio.h" | |
36 #include "abb/abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!! | |
37 | |
38 #if (CHIPSET != 12) | |
39 /* | |
40 * AI_EnableBit | |
41 * | |
42 * Enable ARMIO input/output bit (see CLKM module specification) | |
43 */ | |
44 void AI_EnableBit(int bit) | |
45 { | |
46 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit); | |
47 } | |
48 | |
49 /* | |
50 * AI_DisableBit | |
51 * | |
52 * Disable ARMIO input/output bit (see CLKM module specification) | |
53 */ | |
54 void AI_DisableBit(int bit) | |
55 { | |
56 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit); | |
57 } | |
58 | |
59 #endif /* CHIPSET != 12 */ | |
60 | |
61 /* | |
62 * AI_SetBit | |
63 * | |
64 * Switch-on one bit | |
65 */ | |
66 void AI_SetBit(int bit) | |
67 { | |
68 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit); | |
69 } | |
70 | |
71 /* | |
72 * AI_ResetBit | |
73 * | |
74 * Switch-off one bit | |
75 */ | |
76 void AI_ResetBit(int bit) | |
77 { | |
78 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit); | |
79 } | |
80 | |
81 /* | |
82 * AI_ConfigBitAsOutput | |
83 * | |
84 * Set this bit as an output | |
85 */ | |
86 void AI_ConfigBitAsOutput(int bit) | |
87 { | |
88 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit); | |
89 } | |
90 | |
91 /* | |
92 * AI_ConfigBitAsInput | |
93 * | |
94 * Set this bit as an input | |
95 */ | |
96 void AI_ConfigBitAsInput(int bit) | |
97 { | |
98 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit); | |
99 } | |
100 | |
101 | |
102 /* | |
103 * AI_ReadBit | |
104 * | |
105 * Read value in register | |
106 */ | |
107 SYS_BOOL AI_ReadBit(int bit) | |
108 { | |
109 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit)) | |
110 return (1); | |
111 else | |
112 return (0); | |
113 } | |
114 | |
115 /* | |
116 * AI_Power | |
117 * | |
118 * Switch-on or off the board | |
119 * | |
120 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power) | |
121 * 0 to power-off | |
122 * | |
123 */ | |
124 #if (OP_L1_STANDALONE == 0) | |
125 void AI_Power(SYS_UWORD8 power) | |
126 { | |
127 if (power == 0) | |
128 { | |
129 ABB_Power_Off(); | |
130 } | |
131 } | |
132 #endif | |
133 | |
134 /* | |
135 * AI_ResetIoConfig | |
136 * | |
137 * Reset all default IO configurations | |
138 * | |
139 */ | |
140 void AI_ResetIoConfig(void) | |
141 { | |
142 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs | |
143 #if (CHIPSET != 12) | |
144 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config | |
145 #endif /* CHIPSET != 12 */ | |
146 } | |
147 | |
148 | |
149 /* | |
150 * AI_ClockEnable | |
151 * | |
152 * Enable ARMIO clock module | |
153 * | |
154 */ | |
155 void AI_ClockEnable(void) | |
156 { | |
157 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5 | |
158 } | |
159 | |
160 | |
161 /* | |
162 * AI_InitIOConfig | |
163 * | |
164 * Configure all GPIOs at initialization in order to optimize the power consumption | |
165 * of the C-Sample : | |
166 * - select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
167 * - configure these IOs in output high. | |
168 * - configure the IOs 0 (Vibrator LED) and 1 (LCD_A0) in output low. | |
169 */ | |
170 void AI_InitIOConfig(void) | |
171 { | |
172 // reset the IOs config | |
173 AI_ResetIoConfig(); | |
174 | |
175 // CLKM_IO_CNTL register configuration : | |
176 // select IOs 6,8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
177 AI_EnableBit(0); /* FreeCalypso addition */ | |
178 AI_EnableBit(2); | |
179 AI_EnableBit(4); | |
180 | |
181 #ifdef CONFIG_TARGET_PIRELLI | |
182 AI_EnableBit(1); | |
183 AI_EnableBit(3); | |
184 #endif | |
185 | |
186 /* Bits 5,6,7,8 are used to output I/O 9,10,11,12 or MCSI pins */ | |
187 /* If Bluetooth, IO should be disabled, outputting MCSI used for Bluetooth voice */ | |
188 /* | |
189 * FreeCalypso change: we don't have BT, our new criterion is | |
190 * whether or not a given board is wired for MCSI. | |
191 */ | |
192 #if defined(CONFIG_TARGET_FCDEV3B) || defined(CONFIG_TARGET_PIRELLI) | |
193 AI_DisableBit(5); | |
194 AI_DisableBit(6); | |
195 AI_DisableBit(7); | |
196 AI_DisableBit(8); | |
197 #else | |
198 AI_EnableBit(5); | |
199 AI_EnableBit(6); | |
200 AI_EnableBit(7); | |
201 AI_EnableBit(8); | |
202 #endif | |
203 | |
204 AI_EnableBit(9); | |
205 | |
206 // ARMIO_OUT register configuration : | |
207 // set IOs 8,9,10,11,12 and 13 as high | |
208 // set IOs 0 to 7 as low | |
209 | |
210 #if defined(CONFIG_TARGET_C139) || defined(CONFIG_TARGET_C11X) | |
211 /* C139 GPIO configuration mimics what the original fw sets */ | |
212 | |
213 /* GPIO out all zeros - the LCD backlight is OFF */ | |
214 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
215 | |
216 /* setting of GPIOs as outputs also mimics what the original fw sets */ | |
217 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A09; | |
218 #elif defined(CONFIG_TARGET_PIRELLI) | |
219 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
220 | |
221 AI_ConfigBitAsOutput(1); | |
222 AI_ConfigBitAsOutput(4); | |
223 AI_ConfigBitAsOutput(7); | |
224 #else /* classic TI/Openmoko/FreeCalypso targets */ | |
225 // set IOs 1 and 8 to 13 as high | |
226 // set IOs 0 and 2 to 7 as low | |
227 // On D-Sample GPIO 1 must be set to high to enable the audio amplifier, | |
228 // but on Openmoko's modem it is the interrupt to the AP. | |
229 // On the FCDEV3B it also controls the audio amplifier. | |
230 // For now we initialize it to low on all targets. | |
231 #if 1 | |
232 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F00; | |
233 #else | |
234 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F02; | |
235 #endif | |
236 | |
237 // ARMIO_CNTL_REG register configuration : | |
238 // set IOs 1,2,5,7,9,14 and 15 as ouputs. | |
239 #ifndef CONFIG_TARGET_DSAMPLE | |
240 AI_ConfigBitAsOutput(0); /* FreeCalypso addition */ | |
241 #endif | |
242 AI_ConfigBitAsOutput(1); | |
243 AI_ConfigBitAsOutput(2); | |
244 #ifdef CONFIG_TARGET_GTAMODEM | |
245 AI_ConfigBitAsOutput(3); | |
246 #endif | |
247 #ifndef CONFIG_TARGET_DSAMPLE | |
248 AI_ConfigBitAsOutput(4); /* FreeCalypso addition */ | |
249 #endif | |
250 AI_ConfigBitAsOutput(5); | |
251 #ifndef CONFIG_TARGET_DSAMPLE | |
252 AI_ConfigBitAsOutput(6); /* FreeCalypso addition */ | |
253 #endif | |
254 AI_ConfigBitAsOutput(7); | |
255 #ifndef CONFIG_TARGET_DSAMPLE | |
256 AI_ConfigBitAsOutput(8); /* FreeCalypso addition */ | |
257 #endif | |
258 AI_ConfigBitAsOutput(9); | |
259 #ifdef CONFIG_TARGET_GTAMODEM | |
260 AI_ConfigBitAsOutput(10); | |
261 AI_ConfigBitAsOutput(11); | |
262 AI_ConfigBitAsOutput(12); | |
263 #endif | |
264 #ifndef CONFIG_TARGET_DSAMPLE | |
265 AI_ConfigBitAsOutput(13); /* FreeCalypso addition */ | |
266 #endif | |
267 AI_ConfigBitAsOutput(14); | |
268 AI_ConfigBitAsOutput(15); | |
269 #endif | |
270 } | |
271 | |
272 /* | |
273 * AI_SelectIOForIT | |
274 * | |
275 * Select which IO will be used to generate an interrupt. | |
276 * 'Edge' specifies if interrup must be detected on falling or rising edge. | |
277 * | |
278 * Warning: parameters are not checked. | |
279 */ | |
280 | |
281 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge) | |
282 { | |
283 #if (CHIPSET == 12) | |
284 /* | |
285 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection | |
286 */ | |
287 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin; | |
288 | |
289 /* | |
290 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection | |
291 */ | |
292 GPIO_INTERRUPT_MASK_REG = 1 << Pin; | |
293 #else | |
294 /* | |
295 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode. | |
296 */ | |
297 | |
298 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1; | |
299 #endif | |
300 } | |
301 | |
302 #if (CHIPSET != 12) | |
303 /* | |
304 * AI_CheckITSource | |
305 * | |
306 * Check if the interrupt specified by 'Source' is active or not. | |
307 * | |
308 * Output: 0: IT is not active | |
309 * 1: IT is active | |
310 * | |
311 * Warning: parameters are not checked. | |
312 * | |
313 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt | |
314 * must be checked first because the GPIO status bit is reset when | |
315 * the register is read. | |
316 */ | |
317 | |
318 int AI_CheckITSource (SYS_UWORD16 Source) | |
319 { | |
320 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0); | |
321 } | |
322 | |
323 /* | |
324 * AI_UnmaskIT | |
325 * | |
326 * Unmask the IT specified by 'Source' (keyboard or GPIO). | |
327 * | |
328 * Warning: parameters are not checked. | |
329 */ | |
330 | |
331 void AI_UnmaskIT (SYS_UWORD16 Source) | |
332 { | |
333 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source; | |
334 } | |
335 | |
336 /* | |
337 * AI_MaskIT | |
338 * | |
339 * Mask the IT specified by 'Source' (keyboard or GPIO). | |
340 * | |
341 * Warning: parameters are not checked. | |
342 */ | |
343 | |
344 void AI_MaskIT (SYS_UWORD16 Source) | |
345 { | |
346 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source; | |
347 } | |
348 #endif /* CHIPSET != 12 */ | |
349 | |
350 #if (CHIPSET == 12) | |
351 | |
352 void AI_MaskIT(SYS_UWORD16 d_io_number) { | |
353 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number); | |
354 } /* f_gpio_mask_it() */ | |
355 | |
356 void AI_UnmaskIT(SYS_UWORD16 d_io_number) { | |
357 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number); | |
358 } /* f_gpio_unmask_it() */ | |
359 | |
360 #endif |