FreeCalypso > hg > fc-selenite

comparison src/cs/layer1/audio_cfile/l1audio_init.c @ 0:b6a5e36de839

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
src/cs: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:39:26 +0000
parents
children
comparison
equal deleted inserted replaced
-1:000000000000 0:b6a5e36de839
1 /************* Revision Controle System Header *************
2 * GSM Layer 1 software
3 * L1AUDIO_INIT.C
4 *
5 * Filename l1audio_init.c
6 * Copyright 2003 (C) Texas Instruments
7 *
8 ************* Revision Controle System Header *************/
9
10 /************************************/
11 /* Include files... */
12 /************************************/
13
14 #include "l1_macro.h"
15 #include "l1_confg.h"
16
17
18 #include "l1_types.h"
19 #include "sys_types.h"
20
21 #if (CODE_VERSION == SIMULATION) && (AUDIO_SIMULATION)
22
23
24 #include <stdlib.h>
25 #include <string.h>
26
27 #include "iq.h" // Debug / Init hardware ("eva3.lib")
28 #include "l1_ver.h"
29 #include "l1_const.h"
30 #include "l1_signa.h"
31
32 #if TESTMODE
33 #include "l1tm_defty.h"
34 #endif
35
36 #include "l1audio_const.h"
37 #include "l1audio_cust.h"
38 #include "l1audio_defty.h"
39 #include "l1audio_msgty.h"
40 #include "l1audio_varex.h"
41
42 #if (L1_GTT == 1)
43 #include "l1gtt_const.h"
44 #include "l1gtt_defty.h"
45 #endif
46 //added here from e-sample for AAC
47 #if (L1_DYN_DSP_DWNLD == 1)
48 #include "l1_dyn_dwl_const.h"
49 #include "l1_dyn_dwl_defty.h"
50 #endif
51 #if (L1_MP3 == 1)
52 #include "l1mp3_defty.h"
53 #endif
54
55 #if (L1_MIDI == 1)
56 #include "l1midi_defty.h"
57 #endif
58 //added here from e-sample for AAC
59 #if (L1_AAC == 1)
60 #include "l1aac_defty.h"
61 #endif
62 #include "l1_defty.h"
63 #include "cust_os.h"
64 #include "l1_msgty.h"
65 #include "l1_varex.h"
66 #include "l1_mftab.h"
67 #include "l1_tabs.h"
68 #include "l1_ctl.h"
69
70 #include "l1_time.h"
71 #include "l1_scen.h"
72 #else // NOT SIMULATION
73
74 // Layer1 and debug include files.
75 #include <ctype.h>
76 #include <math.h>
77 #include "l1_ver.h"
78 #include "l1_const.h"
79 #include "l1_signa.h"
80
81 #if TESTMODE
82 #include "l1tm_defty.h"
83 #endif
84
85 #include "l1audio_const.h"
86 #include "l1audio_cust.h"
87 #include "l1audio_defty.h"
88 #include "l1audio_msgty.h"
89 #include "l1audio_varex.h"
90
91 #if (L1_GTT == 1)
92 #include "l1gtt_const.h"
93 #include "l1gtt_defty.h"
94 #endif
95 //added here from e-sample for AAC
96 #if (L1_DYN_DSP_DWNLD == 1)
97 #include "l1_dyn_dwl_const.h"
98 #include "l1_dyn_dwl_defty.h"
99 #endif
100 #if (L1_MP3 == 1)
101 #include "l1mp3_defty.h"
102 #endif
103
104 #if (L1_MIDI == 1)
105 #include "l1midi_defty.h"
106 #endif
107 //added here from e-sample for AAC
108 #if (L1_AAC == 1)
109 #include "l1aac_defty.h"
110 #endif
111
112 #include "l1_defty.h"
113 #include "cust_os.h"
114 #include "l1_msgty.h"
115 #include "tpudrv.h" // TPU drivers. ("eva3.lib")
116 #include "l1_varex.h"
117 #include "l1_proto.h"
118 #include "l1_mftab.h"
119 #include "l1_tabs.h"
120 #include "mem.h"
121 #include "armio.h"
122 #include "timer.h"
123 #include "timer1.h"
124 #include "dma.h"
125 #include "inth.h"
126 #include "ulpd.h"
127 #include "rhea_arm.h"
128 #include "clkm.h" // Clockm ("eva3.lib")
129 #include "l1_ctl.h"
130 #include "l1_time.h"
131
132 #if L2_L3_SIMUL
133 #include "l1_scen.h"
134 #endif
135 #endif // NOT_SIMULATION
136
137 #if (L1_DRC == 1)
138 extern T_DRC_MCU_DSP *drc_ndb;
139 #if (CODE_VERSION == SIMULATION)
140 extern T_DRC_MCU_DSP drc_ndb_sim;
141 #endif
142 #endif
143
144 #if(L1_BT_AUDIO ==1)
145 extern T_L1_BT_AUDIO bt_audio;
146 #endif
147
148 /**************************************/
149 /* Prototypes for L1 initialization */
150 /**************************************/
151 void l1audio_dsp_init (void);
152 void l1audio_initialize_var (void);
153
154 /**************************************/
155 /* External prototypes */
156 /**************************************/
157
158 /*-------------------------------------------------------*/
159 /* l1audio_dsp_init() */
160 /*-------------------------------------------------------*/
161 /* */
162 /* Parameters : */
163 /* */
164 /* Return : */
165 /* */
166 /* Description : Initialize the part of the API */
167 /* dedicated to the audio task. */
168 /* */
169 /*-------------------------------------------------------*/
170 void l1audio_dsp_init(void)
171 {
172 UWORD8 i, j;
173
174 //-----------------------------------
175 // AUDIO control words initialization
176 //-----------------------------------
177 l1s_dsp_com.dsp_ndb_ptr->d_toneskb_init = 0; // MCU/DSP audio task com. register
178 l1s_dsp_com.dsp_ndb_ptr->d_toneskb_status = 0; // MCU/DSP audio task com. register
179
180 #if (KEYBEEP)
181 l1s_dsp_com.dsp_ndb_ptr->d_k_x1_kt0 = 0; // keybeep variable
182 l1s_dsp_com.dsp_ndb_ptr->d_k_x1_kt1 = 0; // keybeep variable
183 l1s_dsp_com.dsp_ndb_ptr->d_dur_kb = 0; // keybeep variable
184 #endif
185
186 #if ((TONE) || (VOICE_MEMO))
187 l1s_dsp_com.dsp_ndb_ptr->d_k_x1_t0 = 0; // tone variable
188 l1s_dsp_com.dsp_ndb_ptr->d_k_x1_t1 = 0; // tone variable
189 l1s_dsp_com.dsp_ndb_ptr->d_k_x1_t2 = 0; // tone variable
190 l1s_dsp_com.dsp_ndb_ptr->d_pe_rep = 0; // tone variable
191 l1s_dsp_com.dsp_ndb_ptr->d_pe_off = 0; // tone variable
192 l1s_dsp_com.dsp_ndb_ptr->d_se_off = 0; // tone variable
193 l1s_dsp_com.dsp_ndb_ptr->d_bu_off = 0; // tone variable
194 l1s_dsp_com.dsp_ndb_ptr->d_t0_on = 0; // tone variable
195 l1s_dsp_com.dsp_ndb_ptr->d_t0_off = 0; // tone variable
196 l1s_dsp_com.dsp_ndb_ptr->d_t1_on = 0; // tone variable
197 l1s_dsp_com.dsp_ndb_ptr->d_t1_off = 0; // tone variable
198 l1s_dsp_com.dsp_ndb_ptr->d_t2_on = 0; // tone variable
199 l1s_dsp_com.dsp_ndb_ptr->d_t2_off = 0; // tone variable
200
201 l1s_dsp_com.dsp_ndb_ptr->d_shiftul = 0x100;
202 l1s_dsp_com.dsp_ndb_ptr->d_shiftdl = 0x100;
203 #endif // (TONE) || (VOICE_MEMO)
204 #if (L1_PCM_EXTRACTION)
205 l1s_dsp_com.dsp_ndb_ptr->d_pcm_api_upload = 0;
206 l1s_dsp_com.dsp_ndb_ptr->d_pcm_api_download = 0;
207 l1s_dsp_com.dsp_ndb_ptr->d_pcm_api_error = 0;
208 #endif
209
210 // Correction of PR G23M/L1_MCU-SPR-15494
211 #if ((CHIPSET == 12) || (CHIPSET == 15))
212 #if (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
213 l1s_dsp_com.dsp_ndb_ptr->d_cport_init = 0;
214 l1s_dsp_com.dsp_ndb_ptr->d_cport_ctrl = 0;
215 l1s_dsp_com.dsp_ndb_ptr->a_cport_cfr[0] = 0;
216 l1s_dsp_com.dsp_ndb_ptr->a_cport_cfr[1] = 0;
217 l1s_dsp_com.dsp_ndb_ptr->d_cport_tcl_tadt = 0;
218 l1s_dsp_com.dsp_ndb_ptr->d_cport_tdat = 0;
219 l1s_dsp_com.dsp_ndb_ptr->d_cport_tvs = 0;
220 #endif
221 #endif
222
223 #if (L1_VOICE_MEMO_AMR)
224 l1s_dsp_com.dsp_ndb_ptr->d_shiftul = 0x100;
225 #endif // L1_VOICE_MEMO_AMR
226
227 #if (MELODY_E1)
228 l1s_dsp_com.dsp_ndb_ptr->d_melo_osc_used = 0;
229 l1s_dsp_com.dsp_ndb_ptr->d_melo_osc_active = 0;
230
231 l1s_dsp_com.dsp_ndb_ptr->a_melo_note0[0] = SC_END_OSCILLATOR_MASK;
232 l1s_dsp_com.dsp_ndb_ptr->a_melo_note1[0] = SC_END_OSCILLATOR_MASK;
233 l1s_dsp_com.dsp_ndb_ptr->a_melo_note2[0] = SC_END_OSCILLATOR_MASK;
234 l1s_dsp_com.dsp_ndb_ptr->a_melo_note3[0] = SC_END_OSCILLATOR_MASK;
235 l1s_dsp_com.dsp_ndb_ptr->a_melo_note4[0] = SC_END_OSCILLATOR_MASK;
236 l1s_dsp_com.dsp_ndb_ptr->a_melo_note5[0] = SC_END_OSCILLATOR_MASK;
237 l1s_dsp_com.dsp_ndb_ptr->a_melo_note6[0] = SC_END_OSCILLATOR_MASK;
238 l1s_dsp_com.dsp_ndb_ptr->a_melo_note7[0] = SC_END_OSCILLATOR_MASK;
239 #endif // MELODY_E1
240
241 // Initialize the FIR as an all band pass
242 // IMPORTANT NOTE: FIR/DL parameters are also initialized for DSP 36 when L1_IIR == 1 because
243 // in FIR loop mode, the old FIR API is still used
244 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)// The FIR coefficents are in param memory
245 l1s_dsp_com.dsp_param_ptr->a_fir31_downlink[0] = 0x4000;
246 l1s_dsp_com.dsp_param_ptr->a_fir31_uplink[0] = 0x4000;
247 #else
248 l1s_dsp_com.dsp_ndb_ptr->a_fir31_downlink[0] = 0x4000;
249 l1s_dsp_com.dsp_ndb_ptr->a_fir31_uplink[0] = 0x4000;
250 #endif
251
252 for (i=1; i<MAX_FIR_COEF; i++)
253 {
254 #if (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)// The FIR coefficents are in param memory
255 l1s_dsp_com.dsp_param_ptr->a_fir31_downlink[i] = 0;
256 l1s_dsp_com.dsp_param_ptr->a_fir31_uplink[i] = 0;
257 #else
258 l1s_dsp_com.dsp_ndb_ptr->a_fir31_downlink[i] = 0;
259 l1s_dsp_com.dsp_ndb_ptr->a_fir31_uplink[i] = 0;
260 #endif
261 }
262 #if (DSP == 17) || (DSP == 32)
263 // start the FIR task
264 l1s_dsp_com.dsp_ndb_ptr->d_audio_init |= B_FIR_START;
265 #endif
266
267 #if (L1_IIR == 1)
268 // IIR enabled by default
269 // Set the default configuration (all band pass - FIR only mode)
270 l1s_dsp_com.dsp_ndb_ptr->d_iir_nb_iir_blocks = 0;
271 l1s_dsp_com.dsp_ndb_ptr->d_iir_nb_fir_coefs = 0x1f;
272
273 l1s_dsp_com.dsp_ndb_ptr->a_iir_fir_coefs[0] = 0x4000;
274 for (i=1; i < (l1s_dsp_com.dsp_ndb_ptr->d_iir_nb_fir_coefs - 1); i++)
275 l1s_dsp_com.dsp_ndb_ptr->a_iir_fir_coefs[i] = 0;
276
277 l1s_dsp_com.dsp_ndb_ptr->d_iir_input_scaling = 0;
278 l1s_dsp_com.dsp_ndb_ptr->d_iir_fir_scaling = 0;
279 l1s_dsp_com.dsp_ndb_ptr->d_iir_input_gain_scaling = 0;
280 l1s_dsp_com.dsp_ndb_ptr->d_iir_output_gain_scaling = 0;
281 l1s_dsp_com.dsp_ndb_ptr->d_iir_output_gain = 0xffff;
282 l1s_dsp_com.dsp_ndb_ptr->d_iir_feedback = 0;
283 #endif
284
285 #if (AUDIO_MODE)
286 // Reset the FIR loopback and the audio mode
287 l1s_dsp_com.dsp_ndb_ptr->d_audio_init &= ~(B_FIR_LOOP | B_GSM_ONLY | B_BT_HEADSET | B_BT_CORDLESS);
288 // Set the GSM mode
289 l1s_dsp_com.dsp_ndb_ptr->d_audio_init |= B_GSM_ONLY;
290 #else
291 // Reset the loopback
292 l1s_dsp_com.dsp_ndb_ptr->d_audio_init &= ~(B_FIR_LOOP);
293 #endif
294
295 #if (W_A_DSP_SR_BGD)
296 // Initialize the DSP speech reco background task
297
298 // DSP background enabled for SR.
299 l1s_dsp_com.dsp_param_ptr->d_gsm_bgd_mgt = (B_DSPBGD_RECO | B_DSPBGD_UPD);
300 l1s_dsp_com.dsp_ndb_ptr->d_max_background = 7;
301
302 // TEMPORARY: Init DSP background interface for RECO.
303 if (l1s_dsp_com.dsp_param_ptr->d_gsm_bgd_mgt & B_DSPBGD_RECO)
304 {
305 l1s_dsp_com.dsp_ndb_ptr->d_background_enable &= ~(1 << C_BGD_RECOGN);
306 l1s_dsp_com.dsp_ndb_ptr->d_background_abort &= ~(1 << C_BGD_RECOGN);
307 l1s_dsp_com.dsp_ndb_ptr->a_background_tasks[C_BGD_RECOGN] = (C_BGD_RECOGN<<11) | 1;
308 l1s_dsp_com.dsp_ndb_ptr->a_back_task_io[C_BGD_RECOGN] = (API)(0x0000); // Not used by Recognition task.
309 }
310 if (l1s_dsp_com.dsp_param_ptr->d_gsm_bgd_mgt & B_DSPBGD_UPD)
311 {
312 l1s_dsp_com.dsp_ndb_ptr->d_background_enable &= ~(1 << C_BGD_ALIGN);
313 l1s_dsp_com.dsp_ndb_ptr->d_background_abort &= ~(1 << C_BGD_ALIGN);
314 l1s_dsp_com.dsp_ndb_ptr->a_background_tasks[C_BGD_ALIGN] = (C_BGD_ALIGN<<11) | 1;
315 l1s_dsp_com.dsp_ndb_ptr->a_back_task_io[C_BGD_ALIGN] = (API)(0x0000); // Not used by Alignement task.
316 }
317 #elif (DSP == 33) || (DSP == 34) || (DSP == 35) || (DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39)
318 // DSP background task through pending task queue
319 l1s_dsp_com.dsp_param_ptr->d_gsm_bgd_mgt = 0;
320 #endif
321
322 #if (MELODY_E2)
323 // Initalize the Audio compressor used for E2
324 l1s_dsp_com.dsp_ndb_ptr->d_audio_compressor_ctrl = 0x0401;
325
326 // Initialize the melody E2 variables
327 l1s_dsp_com.dsp_ndb_ptr->d_melody_e2_osc_stop = 0x0000;
328 l1s_dsp_com.dsp_ndb_ptr->d_melody_e2_osc_active = 0x0000;
329 l1s_dsp_com.dsp_ndb_ptr->d_melody_e2_semaphore = 0x0000;
330 for(i=0; i<SC_MELODY_E2_NUMBER_OF_OSCILLATOR; i++)
331 {
332 l1s_dsp_com.dsp_ndb_ptr->a_melody_e2_osc[i][0] = 0x0000;
333 }
334 l1s_dsp_com.dsp_ndb_ptr->d_melody_e2_globaltimefactor = 0x0000;
335
336 for (i=0; i<(SC_AUDIO_MELODY_E2_MAX_NUMBER_OF_INSTRUMENT); i++)
337 {
338 l1s_dsp_com.dsp_ndb_ptr->a_melody_e2_instrument_ptr[i] = 0x0000;
339 }
340
341 /* FreeCalypso: reconstructed from disassembly of TCS211 object */
342 l1s_dsp_com.dsp_ndb_ptr->d_melody_e2_deltatime = 0;
343
344 // Reset the flag to know if the DSP melody E2 task runs
345 l1s.melody_e2.dsp_task = FALSE;
346 #endif // MELODY_E2
347
348 #if ((DSP==33) || (DSP == 34) || (DSP==35) || (DSP==36) || (DSP == 37) || (DSP == 38) || (DSP == 39))
349 // Linked to E2 melody
350 // In case of WCP, there is a WCP variable at this address
351 l1s_dsp_com.dsp_ndb_ptr->d_melody_selection = NO_MELODY_SELECTED;
352 #endif
353
354
355 #if ((CHIPSET == 4) || (CHIPSET == 12) || (CHIPSET == 15) || ((CHIPSET==10) && (OP_WCP==1))) && ((DSP == 36) || (DSP == 37) || (DSP == 38) || (DSP == 39))
356 l1s_dsp_com.dsp_ndb_ptr->d_es_ctrl = 0; // ES control
357 l1s_dsp_com.dsp_ndb_ptr->d_anr_ul_ctrl = 0; // ANR control
358 #if (L1_IIR == 1)
359 l1s_dsp_com.dsp_ndb_ptr->d_iir_dl_ctrl = B_IIR_ENABLE; // IIR control: enabled by default
360 #else
361 l1s_dsp_com.dsp_ndb_ptr->d_iir_dl_ctrl = 0;
362 #endif
363 l1s_dsp_com.dsp_ndb_ptr->d_lim_dl_ctrl = 0; // Limiter control
364
365 #endif
366
367 #if (DSP == 38) || (DSP == 39)
368
369 //-----------------------------------
370 // AUDIO control words initialization
371 //-----------------------------------
372
373 l1s_dsp_com.dsp_ndb_ptr->d_es_ctrl = 0; // ES control
374 l1s_dsp_com.dsp_ndb_ptr->d_anr_ul_ctrl = 0; // ANR control
375 l1s_dsp_com.dsp_ndb_ptr->d_aec_ul_ctrl = 0; // AEC control
376 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_ctrl = 0; // AGC control
377
378 #if (L1_IIR == 1)
379 l1s_dsp_com.dsp_ndb_ptr->d_iir_dl_ctrl = B_IIR_ENABLE; // IIR control: enabled by default
380 #else
381 l1s_dsp_com.dsp_ndb_ptr->d_iir_dl_ctrl = 0;
382 #endif
383 l1s_dsp_com.dsp_ndb_ptr->d_lim_dl_ctrl = 0; // Limiter control
384 l1s_dsp_com.dsp_ndb_ptr->d_drc_dl_ctrl = 0; // DRC control
385 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_ctrl = 0; // AGC control
386 l1s_dsp_com.dsp_ndb_ptr->d_audio_apps_ctrl = 0; // WCM control
387 l1s_dsp_com.dsp_ndb_ptr->d_audio_apps_status = 0; // WCM status
388 l1s_dsp_com.dsp_ndb_ptr->d_aqi_status = 0; // Initialise the status word
389
390 #if(L1_ANR == 2)
391 l1s_dsp_com.dsp_ndb_ptr->d_anr_control = (API) 0;
392 l1s_dsp_com.dsp_ndb_ptr->d_anr_ns_level = (API) 0;
393 l1s_dsp_com.dsp_ndb_ptr->d_anr_tone_ene_th = (API) 0;
394 l1s_dsp_com.dsp_ndb_ptr->d_anr_tone_cnt_th = (API) 0;
395 #endif
396
397 #if(L1_IIR == 2)
398 // Set IIR parameters
399 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_control = (API) 0;
400 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_frame_size = (API) 0;
401 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_fir_swap = (API) 0;
402
403 // Set parameter os FIR part
404 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_fir_enable = (API) 0;
405 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_fir_length = (API) 0;
406 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_fir_shift = (API) 0;
407
408 for (i=0; i < IIR_4X_FIR_MAX_LENGTH; i++)
409 {
410 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_fir_taps[i] = (API) 0;
411 }
412
413 // Set parameters for IIR part
414 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_enable = (API) 0;
415 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_number = (API) 0;
416
417 // Set parameters for IIR part - SOS 1
418 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_1 = (API) 0;
419 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_1 = (API) 0;
420
421 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
422 {
423 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_1[j] = (API) 0;
424 }
425 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
426 {
427 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_1[j] = (API) 0;
428 }
429 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_1 = (API) 0;
430
431 // Set parameters for IIR part - SOS 2
432 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_2 = (API) 0;
433 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_2 = (API) 0;
434
435 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
436 {
437 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_2[j] = (API) 0;
438 }
439 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
440 {
441 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_2[j] = (API) 0;
442 }
443 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_2 = (API) 0;
444
445 // Set parameters for IIR part - SOS 3
446 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_3 = (API) 0;
447 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_3 = (API) 0;
448
449 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
450 {
451 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_3[j] = (API) 0;
452 }
453 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
454 {
455 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_3[j] = (API) 0;
456 }
457 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_3 = (API) 0;
458
459 // Set parameters for IIR part - SOS 4
460 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_4 = (API) 0;
461 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_4 = (API) 0;
462
463 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
464 {
465 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_4[j] = (API) 0;
466 }
467 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
468 {
469 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_4[j] = (API) 0;
470 }
471 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_4 = (API) 0;
472
473 // Set parameters for IIR part - SOS 5
474 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_5 = (API) 0;
475 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_5 = (API) 0;
476
477 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
478 {
479 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_5[j] = (API) 0;
480 }
481 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
482 {
483 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_5[j] = (API) 0;
484 }
485 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_5 = (API) 0;
486
487 // Set parameters for IIR part - SOS 6
488 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_6 = (API) 0;
489 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_fact_form_6 = (API) 0;
490
491 for (j=0; j < IIR_4X_ORDER_OF_SECTION; j++)
492 {
493 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_den_6[j] = (API) 0;
494 }
495 for (j=0; j < (IIR_4X_ORDER_OF_SECTION + 1); j++)
496 {
497 l1s_dsp_com.dsp_ndb_ptr->a_iir4x_sos_num_6[j] = (API) 0;
498 }
499 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_sos_num_form_6 = (API) 0;
500
501 l1s_dsp_com.dsp_ndb_ptr->d_iir4x_gain = (API) 0;
502
503 #endif
504
505 #if(L1_AGC_UL == 1)
506 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_control = (API) 0;
507 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_frame_size = (API) 0;
508 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_targeted_level = (API) 0;
509 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_signal_up = (API) 0;
510 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_signal_down = (API) 0;
511 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_max_scale = (API) 0;
512 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_gain_smooth_alpha = (API) 0;
513 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_gain_smooth_alpha_fast = (API) 0;
514 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_gain_smooth_beta = (API) 0;
515 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_gain_smooth_beta_fast = (API) 0;
516 l1s_dsp_com.dsp_ndb_ptr->d_agc_ul_gain_intp_flag = (API) 0;
517 #endif
518
519 #if(L1_AGC_DL == 1)
520 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_control = (API) 0;
521 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_frame_size = (API) 0;
522 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_targeted_level = (API) 0;
523 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_signal_up = (API) 0;
524 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_signal_down = (API) 0;
525 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_max_scale = (API) 0;
526 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_gain_smooth_alpha = (API) 0;
527 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_gain_smooth_alpha_fast = (API) 0;
528 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_gain_smooth_beta = (API) 0;
529 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_gain_smooth_beta_fast = (API) 0;
530 l1s_dsp_com.dsp_ndb_ptr->d_agc_dl_gain_intp_flag = (API) 0;
531 #endif
532
533 #if(L1_WCM == 1)
534
535 l1s_dsp_com.dsp_ndb_ptr->d_wcm_mode = (API) 0;
536 l1s_dsp_com.dsp_ndb_ptr->d_wcm_frame_size = (API) 0;
537 l1s_dsp_com.dsp_ndb_ptr->d_wcm_num_sub_frames = (API) 0;
538 l1s_dsp_com.dsp_ndb_ptr->d_wcm_ratio = (API) 0;
539 l1s_dsp_com.dsp_ndb_ptr->d_wcm_threshold = (API) 0;
540 #endif
541
542 #endif // DSP 38
543
544 }
545
546
547 #if (AUDIO_TASK == 1)
548
549 /*-------------------------------------------------------*/
550 /* l1audio_initialize_var() */
551 /*-------------------------------------------------------*/
552 /* */
553 /* Parameters : */
554 /* */
555 /* Return : */
556 /* */
557 /* Description : Initialize the part of l1a, l1s and */
558 /* l1a_l1s_com dedicated to the audio task.*/
559 /* */
560 /*-------------------------------------------------------*/
561 void l1audio_initialize_var(void)
562 {
563 UWORD8 i, j;
564
565 // Initialize the state of the L1S maanger...
566 //--------------------------------------------
567 for(i=0; i<NBR_AUDIO_MANAGER; i++)
568 {
569 l1s.audio_state[i] = 0;
570 }
571
572 #if (L1_EXTERNAL_AUDIO_VOICE_ONOFF == 1)
573 l1a_l1s_com.audio_onoff_task.parameters.onoff_value = FALSE;
574 #endif
575 #if 0 /* FreeCalypso TCS211 reconstruction */
576 l1a_l1s_com.audio_forced_by_l1s = FALSE;
577 #endif
578
579 #if (MELODY_E1)
580 l1s.melody0.oscillator[0] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note0[0]);
581 l1s.melody0.oscillator[1] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note1[0]);
582 l1s.melody0.oscillator[2] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note2[0]);
583 l1s.melody0.oscillator[3] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note3[0]);
584 l1s.melody0.oscillator[4] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note4[0]);
585 l1s.melody0.oscillator[5] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note5[0]);
586 l1s.melody0.oscillator[6] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note6[0]);
587 l1s.melody0.oscillator[7] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note7[0]);
588
589 l1s.melody1.oscillator[0] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note0[0]);
590 l1s.melody1.oscillator[1] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note1[0]);
591 l1s.melody1.oscillator[2] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note2[0]);
592 l1s.melody1.oscillator[3] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note3[0]);
593 l1s.melody1.oscillator[4] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note4[0]);
594 l1s.melody1.oscillator[5] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note5[0]);
595 l1s.melody1.oscillator[6] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note6[0]);
596 l1s.melody1.oscillator[7] = &(l1s_dsp_com.dsp_ndb_ptr->a_melo_note7[0]);
597 #endif // MELODY_E1
598
599 #if (MELODY_E2)
600 // Initialization ofthe audio background melody E2 load insturment variable
601 audioback_melody_e2.allowed_size =
602 SC_AUDIO_MELODY_E2_MAX_SIZE_OF_INSTRUMENT;
603 audioback_melody_e2.API_address =
604 l1s_dsp_com.dsp_ndb_ptr->a_melody_e2_instrument_wave;
605
606 for (i=0; i < SC_AUDIO_MELODY_E2_MAX_NUMBER_OF_INSTRUMENT; i++)
607 {
608 audioback_melody_e2.number_of_user[i] = 0;
609 }
610 #endif // MELODY_E2
611
612 #if (L1_STEREOPATH == 1)
613 // Reset the stereopath L1S commands
614 l1a_l1s_com.stereopath_drv_task.command.start = FALSE;
615 l1a_l1s_com.stereopath_drv_task.command.stop = FALSE;
616 #endif
617
618 // Triton Audio ON/OFF Changes
619 #if (L1_AUDIO_MCU_ONOFF == 1)
620 l1s.audio_on_off_ctl.l1_audio_switch_on_ul_request = 0;
621 l1s.audio_on_off_ctl.l1_audio_switch_on_dl_request = 0;
622
623 l1s.audio_on_off_ctl.l1_audio_ul_on2off_hold_time =
624 L1_AUDIO_ON2OFF_UL_HOLD_TIME;
625 l1s.audio_on_off_ctl.l1_audio_dl_on2off_hold_time =
626 L1_AUDIO_ON2OFF_DL_HOLD_TIME;
627
628 l1s.audio_on_off_ctl.l1_audio_ul_action = L1_AUDIO_NO_ACTION;
629 l1s.audio_on_off_ctl.l1_audio_dl_action = L1_AUDIO_NO_ACTION;
630
631 l1s.audio_on_off_ctl.l1_audio_ul_switched_on = FALSE;
632 l1s.audio_on_off_ctl.l1_audio_dl_switched_on = FALSE;
633
634 l1s.audio_on_off_ctl.l1_audio_ul_switched_off = TRUE;
635 l1s.audio_on_off_ctl.l1_audio_dl_switched_off = TRUE;
636 #endif // L1_AUDIO_MCU_ONOFF
637
638
639 #if (L1_DRC == 1)
640
641 // init DRC NDB
642 drc_ndb = (T_DRC_MCU_DSP *)API_address_dsp2mcu(C_DRC_API_BASE_ADDRESS);
643 #if (CODE_VERSION == SIMULATION)
644 {
645 drc_ndb = &drc_ndb_sim;
646 }
647 #endif
648
649 drc_ndb->d_drc_speech_mode_samp_f =(API)0;
650 drc_ndb->d_drc_num_subbands =(API)0;
651 drc_ndb->d_drc_frame_len =(API)0;
652 drc_ndb->d_drc_expansion_knee_fb_bs =(API)0;
653 drc_ndb->d_drc_expansion_knee_md_hg =(API)0;
654 drc_ndb->d_drc_expansion_ratio_fb_bs =(API)0;
655 drc_ndb->d_drc_expansion_ratio_md_hg =(API)0;
656 drc_ndb->d_drc_max_amplification_fb_bs =(API)0;
657 drc_ndb->d_drc_max_amplification_md_hg =(API)0;
658 drc_ndb->d_drc_compression_knee_fb_bs =(API)0;
659 drc_ndb->d_drc_compression_knee_md_hg =(API)0;
660 drc_ndb->d_drc_compression_ratio_fb_bs =(API)0;
661 drc_ndb->d_drc_compression_ratio_md_hg =(API)0;
662 drc_ndb->d_drc_energy_limiting_th_fb_bs =(API)0;
663 drc_ndb->d_drc_energy_limiting_th_md_hg =(API)0;
664 drc_ndb->d_drc_limiter_threshold_fb =(API)0;
665 drc_ndb->d_drc_limiter_threshold_bs =(API)0;
666 drc_ndb->d_drc_limiter_threshold_md =(API)0;
667 drc_ndb->d_drc_limiter_threshold_hg =(API)0;
668 drc_ndb->d_drc_limiter_hangover_spect_preserve =(API)0;
669 drc_ndb->d_drc_limiter_release_fb_bs =(API)0;
670 drc_ndb->d_drc_limiter_release_md_hg =(API)0;
671 drc_ndb->d_drc_gain_track_fb_bs =(API)0;
672 drc_ndb->d_drc_gain_track_md_hg =(API)0;
673 for (j=0; j < DRC_LPF_LENGTH; j++)
674 {
675 drc_ndb->a_drc_low_pass_filter[j] = (API)0;
676 }
677 for (j=0; j < DRC_BPF_LENGTH; j++)
678 {
679 drc_ndb->a_drc_mid_band_filter[j] = (API)0;
680 }
681 #endif
682
683 }
684
685 #endif // AUDIO_TASK