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comparison src/cs/system/template/gsm_ds_int8_compact.template @ 0:b6a5e36de839

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src/cs: initial import from Magnetite
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 15 Jul 2018 04:39:26 +0000
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1 /*
2 * Integrated Protocol Stack Linker command file (all components)
3 *
4 * Target : ARM
5 *
6 * Copyright (c) Texas Instruments 2002, Condat 2002
7 *
8 */
9
10 -c /* Autoinitialize variables at runtime */
11
12 /*********************************/
13 /* SPECIFY THE SYSTEM MEMORY MAP */
14 /*********************************/
15
16 MEMORY
17 {
18 /* CS0: Flash 8 Mbytes ****************************************************/
19 /* Interrupt Vectors Table */
20 I_MEM (RXI) : org = 0x00000000 len = 0x00000100
21
22 /* Boot Sector */
23
24 /* COMMENT1 stuff is commented out when using the 1.22e compiler */
25 /* COMMENT2 stuff ditto, but when using 2.54 */
26
27 B_MEM (RXI) : org = 0x00000100 len = 0x00001f00
28
29 /* Magic Word for Calypso Boot ROM */
30 MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001
31
32 /* Program Memory */
33
34 P_MEM1 (RXI) : org = 0x00004000 len = 0x00000700
35 P_MEM2 (RXI) : org = 0x00004700 len = 0x00000004
36 P_MEM3 (RXI) : org = 0x00004704 len = 0x00400000
37
38 /* FFS Area */
39 FFS_MEM (RX) : org = 0x00700000 len = 0x00100000
40 /**************************************************************************/
41
42 /* CS1: External SRAM 1 Mbytes ********************************************/
43 /* Data Memory */
44 D_MEM1 (RW) : org = 0x01000000 len = 0x00100000
45 /**************************************************************************/
46
47 /* CS2: External SRAM 8 Mbytes ********************************************/
48 /* Data Memory */
49 D_MEM2 (RW) : org = 0x01800000 len = 0x00800000
50 /**************************************************************************/
51
52 /* CS6: Calypso Internal SRAM 512 kbytes **********************************/
53 /* Code & Variables Memory */
54 S_MEM (RXW) : org = 0x00800000 len = 0x00080000
55 /**************************************************************************/
56 }
57
58 /***********************************************/
59 /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
60 /***********************************************/
61
62 /*
63 * Since the bootloader directly calls the INT_Initialize() routine located
64 * in int.s, this int.s code must always be mapped at the same address
65 * (usually in the second flash sector). Its length is about 0x500 bytes.
66 * Then comes the code that need to be loaded into the internal RAM.
67 */
68
69 SECTIONS
70 {
71 .intvecs : {} > I_MEM /* Interrupt Vectors Table */
72 .monitor : > B_MEM /* Monitor Constants & Code */
73 {
74 $(CONST_BOOT_LIB)
75 }
76
77 .inttext : {} > P_MEM1 /* int.s Code */
78
79 .bss_dar : > D_MEM1 /* DAR SWE Variables */
80 {
81 $(BSS_DAR_LIB)
82 }
83
84 /*
85 * The .bss section should not be split to ensure it is initialized to 0
86 * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
87 * or in D_MEM2.
88 */
89
90 .bss : > D_MEM1 | D_MEM2 /* Global & Static Variables */
91 {
92 $(BSS_BOOT_LIB)
93 }
94
95 /*
96 * All .bss sections, which must be mapped in internal RAM must be
97 * grouped in order to initialized the corresponding memory to 0.
98 * This initialization is done in int.s file before calling the Nucleus
99 * routine.
100 */
101
102 GROUP
103 {
104 S_D_Mem /* Label of start address of .bss section in Int. RAM */
105 .DintMem
106 {
107
108 /*
109 * .bss sections of the application
110 */
111
112 $(BSS_LIBS)
113
114 }
115
116 API_HISR_stack : {}
117
118 E_D_Mem /* Label of end address of .bss section in Int. RAM */
119 } > S_MEM
120
121 /*
122 * .text and .const sections which must be mapped in internal RAM.
123 */
124
125 .ldfl : {} > P_MEM2 /* Used to know the start load address */
126 GROUP load = P_MEM3, run = S_MEM
127 {
128 S_P_Mem /* Label of start address of .text & .const sections in Int. RAM */
129 .PIntMem
130 {
131 /*
132 * .text and .const sections of the application.
133 *
134 * The .veneer sections correspond exactly to .text:v&n sections
135 * implementing the veneer functions. The .text:v$n -> .veneer
136 * translation is performed by PTOOL software when PTOOL_OPTIONS
137 * environement variable is set to veneer_section.
138 */
139
140 $(CONST_LIBS)
141
142 }
143 E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
144 }
145
146 /*
147 * The rest of the code is mapped in flash, however the trampolines
148 * load address should be consistent with .text.
149 */
150
151 COMMENT2START
152 `trampolines load = P_MEM3, run = S_MEM
153 COMMENT2END
154
155 .text : {} > P_MEM3 /* Code */
156
157 /*
158 * The rest of the constants is mapped in flash.
159 * The .cinit section should not be split.
160 */
161
162 .cinit : {} > P_MEM3 /* Initialization Tables */
163 .const : {} > P_MEM3 /* Constant Data */
164 KadaAPI : {} > P_MEM3 /* ROMized CLDC */
165
166 .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */
167
168 .stackandheap : > D_MEM1 /* System Stacks, etc... */
169 {
170 /* Leave 20 32bit words for register pushes. */
171 . = align(8);
172 . += 20 * 4;
173
174 /* Stack for abort and/or undefined modes. */
175 exception_stack = .;
176
177 /* Leave 38 32bit words for state saving on exceptions. */
178 _xdump_buffer = .;
179 . += 38 * 4;
180 . = align(8);
181
182 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
183 stack_segment = .;
184 . += 0xB00;
185 }
186
187 .data : {} > D_MEM1 /* Initialized Data */
188 .sysmem : {} > D_MEM1 /* Dynamic Memory Allocation Area */
189
190 }