comparison src/cs/drivers/drv_core/abb/abb.c @ 215:ed876f98fdfd

.../drv_core/abb/abb.[ch]: sync with Tourmaline
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 31 Oct 2022 01:20:40 +0000
parents 4f40ae165be4
children
comparison
equal deleted inserted replaced
214:7751f14fa759 215:ed876f98fdfd
57 #if (RF_FAM == 35) 57 #if (RF_FAM == 35)
58 #include "l1_rf35.h" 58 #include "l1_rf35.h"
59 #endif 59 #endif
60 60
61 #if (RF_FAM == 12) 61 #if (RF_FAM == 12)
62 #include "tpudrv12.h" 62 #include "tpudrv12.h"
63 #include "l1_rf12.h" 63 #include "l1_rf12.h"
64 #endif 64 #endif
65 65
66 #if (RF_FAM == 10) 66 #if (RF_FAM == 10)
67 #include "l1_rf10.h" 67 #include "l1_rf10.h"
108 * needs to be nonzero; the intent is that this variable will be set by the 108 * needs to be nonzero; the intent is that this variable will be set by the
109 * code responsible for putting the LCD into its own powerdown mode. 109 * code responsible for putting the LCD into its own powerdown mode.
110 * This logic is included only for affected targets with LCDs. 110 * This logic is included only for affected targets with LCDs.
111 */ 111 */
112 112
113 #ifdef CONFIG_TARGET_LUNA 113 #ifdef ABB_SLEEP_RESTRICTION
114 int ABB_sleep_allowed = 0; 114 int ABB_sleep_allowed = 0;
115 #endif 115 #endif
116 116
117 #if (ABB_SEMAPHORE_PROTECTION) 117 #if (ABB_SEMAPHORE_PROTECTION)
118 118
119 static NU_SEMAPHORE abb_sem; 119 static NU_SEMAPHORE abb_sem;
120 120
121 /*-----------------------------------------------------------------------*/ 121 /*-----------------------------------------------------------------------*/
122 /* ABB_Sem_Create() */ 122 /* ABB_Sem_Create() */
126 /* No check on the result. */ 126 /* No check on the result. */
127 /* */ 127 /* */
128 /*-----------------------------------------------------------------------*/ 128 /*-----------------------------------------------------------------------*/
129 void ABB_Sem_Create(void) 129 void ABB_Sem_Create(void)
130 { 130 {
131 // create a semaphore with an initial count of 1 and with FIFO type suspension. 131 // create a semaphore with an initial count of 1 and with FIFO type suspension.
132 NU_Create_Semaphore(&abb_sem, "ABB_SEM", 1, NU_FIFO); 132 NU_Create_Semaphore(&abb_sem, "ABB_SEM", 1, NU_FIFO);
133 } 133 }
134 134
135 #endif // ABB_SEMAPHORE_PROTECTION 135 #endif // ABB_SEMAPHORE_PROTECTION
136 136
137 /*-----------------------------------------------------------------------*/ 137 /*-----------------------------------------------------------------------*/
138 /* ABB_Wait_IBIC_Access() */ 138 /* ABB_Wait_IBIC_Access() */
139 /* */ 139 /* */
140 /* This function waits for the first IBIC access. */ 140 /* This function waits for the first IBIC access. */
141 /* */ 141 /* */
142 /*-----------------------------------------------------------------------*/ 142 /*-----------------------------------------------------------------------*/
143 void ABB_Wait_IBIC_Access(void) 143 void ABB_Wait_IBIC_Access(void)
144 { 144 {
145 #if (ANLG_FAM ==1) 145 #if (ANLG_FAM == 1)
146 // Wait 6 OSCAS cycles (100 KHz) for first IBIC access 146 // Wait 6 OSCAS cycles (100 KHz) for first IBIC access
147 // (i.e wait 60us + 10% security marge = 66us) 147 // (i.e wait 60us + 10% security marge = 66us)
148 wait_ARM_cycles(convert_nanosec_to_cycles(66000)); 148 wait_ARM_cycles(convert_nanosec_to_cycles(66000));
149 #elif ((ANLG_FAM ==2) || (ANLG_FAM == 3)) 149 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
150 // Wait 6 x 32 KHz clock cycles for first IBIC access 150 // Wait 6 x 32 KHz clock cycles for first IBIC access
151 // (i.e wait 187us + 10% security marge = 210us) 151 // (i.e wait 187us + 10% security marge = 210us)
152 wait_ARM_cycles(convert_nanosec_to_cycles(210000)); 152 wait_ARM_cycles(convert_nanosec_to_cycles(210000));
153 #endif 153 #endif
154 } 154 }
155 155
156 156
157
158 /*-----------------------------------------------------------------------*/ 157 /*-----------------------------------------------------------------------*/
159 /* ABB_Write_Register_on_page() */ 158 /* ABB_Write_Register_on_page() */
160 /* */ 159 /* */
161 /* This function manages all the spi serial transfer to write to an */ 160 /* This function manages all the spi serial transfer to write to an */
162 /* ABB register on a specified page. */ 161 /* ABB register on a specified page. */
163 /* */ 162 /* */
164 /*-----------------------------------------------------------------------*/ 163 /*-----------------------------------------------------------------------*/
165 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value) 164 void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value)
166 { 165 {
167 volatile SYS_UWORD16 status; 166 volatile SYS_UWORD16 status;
168 167 STATUS sem_status;
169 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 168
169 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
170
171 // check if the semaphore has been correctly created and try to obtain it.
172 // if the semaphore cannot be obtained, the task is suspended and then resumed
173 // as soon as the semaphore is released.
174
175 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
176
177 #endif // ABB_SEMAPHORE_PROTECTION
178
179 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
170 SPI_Ready_for_WR 180 SPI_Ready_for_WR
171 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 181 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
172
173 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
174
175 // check if the semaphore has been correctly created and try to obtain it.
176 // if the semaphore cannot be obtained, the task is suspended and then resumed
177 // as soon as the semaphore is released.
178 if(&abb_sem != 0)
179 {
180 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
181 }
182 #endif // ABB_SEMAPHORE_PROTECTION
183 182
184 // set the ABB page for register access 183 // set the ABB page for register access
185 ABB_SetPage(page); 184 ABB_SetPage(page);
186 185
187 // Write value in reg_id 186 // Write value in reg_id
188 ABB_WriteRegister(reg_id, value); 187 ABB_WriteRegister(reg_id, value);
189 188
190 // set the ABB page for register access at page 0 189 // set the ABB page for register access at page 0
191 ABB_SetPage(PAGE0); 190 ABB_SetPage(PAGE0);
192
193 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
194 // release the semaphore only if it has correctly been created.
195 if(&abb_sem != 0)
196 {
197 NU_Release_Semaphore(&abb_sem);
198 }
199 #endif // ABB_SEMAPHORE_PROTECTION
200 191
201 // Stop the SPI clock 192 // Stop the SPI clock
202 #ifdef SPI_CLK_LOW_POWER 193 #ifdef SPI_CLK_LOW_POWER
203 SPI_CLK_DISABLE 194 SPI_CLK_DISABLE
204 #endif 195 #endif
196
197 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
198 // release the semaphore only if it has correctly been created.
199 if(sem_status == NU_SUCCESS)
200 {
201 NU_Release_Semaphore(&abb_sem);
202 }
203 #endif // ABB_SEMAPHORE_PROTECTION
205 } 204 }
206 205
207 206
208 /*-----------------------------------------------------------------------*/ 207 /*-----------------------------------------------------------------------*/
209 /* ABB_Read_Register_on_page() */ 208 /* ABB_Read_Register_on_page() */
210 /* */ 209 /* */
211 /* This function manages all the spi serial transfer to read one */ 210 /* This function manages all the spi serial transfer to read one */
212 /* ABB register on a specified page. */ 211 /* ABB register on a specified page. */
213 /* */ 212 /* */
214 /* Returns the real data value of the register. */ 213 /* Returns the real data value of the register. */
215 /* */ 214 /* */
216 /*-----------------------------------------------------------------------*/ 215 /*-----------------------------------------------------------------------*/
217 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id) 216 SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id)
218 { 217 {
219 volatile SYS_UWORD16 status; 218 volatile SYS_UWORD16 status;
219 STATUS sem_status;
220 SYS_UWORD16 reg_val; 220 SYS_UWORD16 reg_val;
221 221
222 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 222 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
223
224 // check if the semaphore has been correctly created and try to obtain it.
225 // if the semaphore cannot be obtained, the task is suspended and then resumed
226 // as soon as the semaphore is released.
227
228 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
229
230 #endif // ABB_SEMAPHORE_PROTECTION
231
232 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
223 SPI_Ready_for_RDWR 233 SPI_Ready_for_RDWR
224 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 234 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
225
226 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
227
228 // check if the semaphore has been correctly created and try to obtain it.
229 // if the semaphore cannot be obtained, the task is suspended and then resumed
230 // as soon as the semaphore is released.
231 if(&abb_sem != 0)
232 {
233 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
234 }
235 #endif // ABB_SEMAPHORE_PROTECTION
236 235
237 /* set the ABB page for register access */ 236 /* set the ABB page for register access */
238 ABB_SetPage(page); 237 ABB_SetPage(page);
239 238
240 /* Read selected ABB register */ 239 /* Read selected ABB register */
241 reg_val = ABB_ReadRegister(reg_id); 240 reg_val = ABB_ReadRegister(reg_id);
242 241
243 /* set the ABB page for register access at page 0 */ 242 /* set the ABB page for register access at page 0 */
244 ABB_SetPage(PAGE0); 243 ABB_SetPage(PAGE0);
245
246 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
247 // release the semaphore only if it has correctly been created.
248 if(&abb_sem != 0)
249 {
250 NU_Release_Semaphore(&abb_sem);
251 }
252 #endif // ABB_SEMAPHORE_PROTECTION
253 244
254 // Stop the SPI clock 245 // Stop the SPI clock
255 #ifdef SPI_CLK_LOW_POWER 246 #ifdef SPI_CLK_LOW_POWER
256 SPI_CLK_DISABLE 247 SPI_CLK_DISABLE
257 #endif 248 #endif
258 249
250 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
251 // release the semaphore only if it has correctly been created.
252 if(sem_status == NU_SUCCESS)
253 {
254 NU_Release_Semaphore(&abb_sem);
255 }
256 #endif // ABB_SEMAPHORE_PROTECTION
257
259 return (reg_val); // Return result 258 return (reg_val); // Return result
260 } 259 }
261 260
262 /*------------------------------------------------------------------------*/ 261 /*------------------------------------------------------------------------*/
263 /* ABB_free_13M() */ 262 /* ABB_free_13M() */
264 /* */ 263 /* */
265 /* This function sets the 13M clock working in ABB. A wait loop */ 264 /* This function sets the 13M clock working in ABB. A wait loop */
266 /* is required to allow first slow access to ABB clock register. */ 265 /* is required to allow first slow access to ABB clock register. */
267 /* */ 266 /* */
268 /* WARNING !! : this function must not be protected by semaphore !! */ 267 /* WARNING !! : this function must not be protected by semaphore !! */
269 /* */ 268 /* */
270 /*------------------------------------------------------------------------*/ 269 /*------------------------------------------------------------------------*/
271 void ABB_free_13M(void) 270 void ABB_free_13M(void)
272 { 271 {
273 volatile SYS_UWORD16 status; 272 volatile SYS_UWORD16 status;
274 273
275 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 274 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
276 SPI_Ready_for_WR 275 SPI_Ready_for_WR
277 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 276 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
278 277
279 ABB_SetPage(PAGE0); 278 ABB_SetPage(PAGE0);
280 279
281 // This transmission frees the CLK13 in ABB. 280 // This transmission frees the CLK13 in ABB.
282 ABB_WriteRegister(TOGBR2, 0x08); 281 ABB_WriteRegister(TOGBR2, 0x08);
295 SPI_CLK_DISABLE 294 SPI_CLK_DISABLE
296 #endif 295 #endif
297 } 296 }
298 297
299 298
300
301 /*------------------------------------------------------------------------*/ 299 /*------------------------------------------------------------------------*/
302 /* ABB_stop_13M() */ 300 /* ABB_stop_13M() */
303 /* */ 301 /* */
304 /* This function stops the 13M clock in ABB. */ 302 /* This function stops the 13M clock in ABB. */
305 /* */ 303 /* */
306 /*------------------------------------------------------------------------*/ 304 /*------------------------------------------------------------------------*/
307 void ABB_stop_13M(void) 305 void ABB_stop_13M(void)
308 { 306 {
309 volatile SYS_UWORD16 status; 307 volatile SYS_UWORD16 status;
310 308
311 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 309 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
312 SPI_Ready_for_WR 310 SPI_Ready_for_WR
313 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 311 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
314 312
315 ABB_SetPage(PAGE0); 313 ABB_SetPage(PAGE0);
316 314
317 // Set ACTIVMCLK = 0. 315 // Set ACTIVMCLK = 0.
318 ABB_WriteRegister(TOGBR2, 0x04); 316 ABB_WriteRegister(TOGBR2, 0x04);
325 SPI_CLK_DISABLE 323 SPI_CLK_DISABLE
326 #endif 324 #endif
327 } 325 }
328 326
329 327
330
331 /*------------------------------------------------------------------------*/ 328 /*------------------------------------------------------------------------*/
332 /* ABB_Read_Status() */ 329 /* ABB_Read_Status() */
333 /* */ 330 /* */
334 /* This function reads and returns the value of VRPCSTS ABB register. */ 331 /* This function reads and returns the value of VRPCSTS ABB register. */
335 /* */ 332 /* */
336 /*------------------------------------------------------------------------*/ 333 /*------------------------------------------------------------------------*/
337 SYS_UWORD16 ABB_Read_Status(void) 334 SYS_UWORD16 ABB_Read_Status(void)
338 { 335 {
339 volatile SYS_UWORD16 status; 336 volatile SYS_UWORD16 status;
337 STATUS sem_status;
340 SYS_UWORD16 reg_val; 338 SYS_UWORD16 reg_val;
341 339
342 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 340 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
341
342 // check if the semaphore has been correctly created and try to obtain it.
343 // if the semaphore cannot be obtained, the task is suspended and then resumed
344 // as soon as the semaphore is released.
345
346 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
347
348 #endif // ABB_SEMAPHORE_PROTECTION
349
350 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
343 SPI_Ready_for_WR 351 SPI_Ready_for_WR
344 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 352 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
345
346 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
347
348 // check if the semaphore has been correctly created and try to obtain it.
349 // if the semaphore cannot be obtained, the task is suspended and then resumed
350 // as soon as the semaphore is released.
351 if(&abb_sem != 0)
352 {
353 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
354 }
355 #endif // ABB_SEMAPHORE_PROTECTION
356 353
357 ABB_SetPage(PAGE0); 354 ABB_SetPage(PAGE0);
358 355
359 #if (ANLG_FAM == 1) || (ANLG_FAM == 2) 356 #if (ANLG_FAM == 1) || (ANLG_FAM == 2)
360 ABB_SetPage(PAGE0); 357 ABB_SetPage(PAGE0);
362 #elif (ANLG_FAM == 3) 359 #elif (ANLG_FAM == 3)
363 ABB_SetPage(PAGE1); 360 ABB_SetPage(PAGE1);
364 reg_val = ABB_ReadRegister(VRPCCFG); 361 reg_val = ABB_ReadRegister(VRPCCFG);
365 #endif 362 #endif
366 363
367 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
368 // release the semaphore only if it has correctly been created.
369 if(&abb_sem != 0)
370 {
371 NU_Release_Semaphore(&abb_sem);
372 }
373 #endif // ABB_SEMAPHORE_PROTECTION
374
375 // Stop the SPI clock 364 // Stop the SPI clock
376 #ifdef SPI_CLK_LOW_POWER 365 #ifdef SPI_CLK_LOW_POWER
377 SPI_CLK_DISABLE 366 SPI_CLK_DISABLE
378 #endif 367 #endif
379 368
380 return (reg_val); 369 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
370 // release the semaphore only if it has correctly been created.
371 if(sem_status == NU_SUCCESS)
372 {
373 NU_Release_Semaphore(&abb_sem);
374 }
375 #endif // ABB_SEMAPHORE_PROTECTION
376
377 return (reg_val);
381 } 378 }
382 379
383 /*------------------------------------------------------------------------*/ 380 /*------------------------------------------------------------------------*/
384 /* ABB_on() */ 381 /* ABB_on() */
385 /* */ 382 /* */
386 /* This function configures ABB registers to work in ON condition */ 383 /* This function configures ABB registers to work in ON condition */
387 /* */ 384 /* */
388 /*------------------------------------------------------------------------*/ 385 /*------------------------------------------------------------------------*/
389 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag) 386 void ABB_on(SYS_UWORD16 modules, SYS_UWORD8 bRecoveryFlag)
390 { 387 {
391 volatile SYS_UWORD16 status; 388 volatile SYS_UWORD16 status;
392 #if ((ANLG_FAM ==2) || (ANLG_FAM == 3)) 389 STATUS sem_status;
390 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
393 SYS_UWORD32 reg; 391 SYS_UWORD32 reg;
394 #endif 392 #endif
395 393
394 #if (ABB_SEMAPHORE_PROTECTION == 3)
395
396 // check if the semaphore has been correctly created and try to obtain it.
397 // if the semaphore cannot be obtained, the task is suspended and then resumed
398 // as soon as the semaphore is released.
399
400 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
401
402 #endif // ABB_SEMAPHORE_PROTECTION
403
396 // a possible cause of the recovery is that ABB is on Oscas => switch from Oscas to CLK13 404 // a possible cause of the recovery is that ABB is on Oscas => switch from Oscas to CLK13
397 if (bRecoveryFlag) 405 if (bRecoveryFlag)
398 { 406 {
399 // RESTITUTE 13MHZ CLOCK TO ABB 407 // RESTITUTE 13MHZ CLOCK TO ABB
400 //--------------------------------------------------- 408 //---------------------------------------------------
401 ABB_free_13M(); 409 ABB_free_13M();
402 410
403 // RESTITUTE 13MHZ CLOCK TO ABB AGAIN (C.F. BUG1719) 411 // RESTITUTE 13MHZ CLOCK TO ABB AGAIN (C.F. BUG1719)
404 //--------------------------------------------------- 412 //---------------------------------------------------
405 ABB_free_13M(); 413 ABB_free_13M();
406 } 414 }
407 415
408 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 416 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
409 SPI_Ready_for_RDWR 417 SPI_Ready_for_RDWR
410 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 418 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
411
412 #if (ABB_SEMAPHORE_PROTECTION == 3)
413
414 // check if the semaphore has been correctly created and try to obtain it.
415 // if the semaphore cannot be obtained, the task is suspended and then resumed
416 // as soon as the semaphore is released.
417 if(&abb_sem != 0)
418 {
419 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
420 }
421 #endif // ABB_SEMAPHORE_PROTECTION
422 419
423 ABB_SetPage(PAGE0); 420 ABB_SetPage(PAGE0);
424 421
425 // This transmission disables MADC,AFC,VDL,VUL modules. 422 // This transmission disables MADC,AFC,VDL,VUL modules.
426 ABB_WriteRegister(TOGBR1, 0x0155); 423 ABB_WriteRegister(TOGBR1, 0x0155);
427 424
428 #if (ANLG_FAM == 1) 425 #if (ANLG_FAM == 1)
429 // This transmission disables Band gap fast mode Enable BB charge. 426 // This transmission disables Band gap fast mode Enable BB charge.
430 ABB_WriteRegister(VRPCCTL2, 0x1fc); 427 ABB_WriteRegister(VRPCCTL2, 0x1fc);
431 428
432 /* *********** DC/DC enabling selection ************************************************************** */ 429 /* *********** DC/DC enabling selection ************************************************************** */
433 // This transmission changes the register page in OMEGA for usp to pg1. 430 // This transmission changes the register page in OMEGA for usp to pg1.
434 ABB_SetPage(PAGE1); 431 ABB_SetPage(PAGE1);
435 432
442 #else 439 #else
443 vrpcctrl3_data = 0x00bd; // core voltage 1.8V for C05 440 vrpcctrl3_data = 0x00bd; // core voltage 1.8V for C05
444 #endif 441 #endif
445 442
446 if(modules & DCDC) // check if the DCDC is enabled 443 if(modules & DCDC) // check if the DCDC is enabled
447 { 444 {
448 vrpcctrl3_data |= 0x0002; // set DCDCEN 445 vrpcctrl3_data |= 0x0002; // set DCDCEN
449 } 446 }
450 447
451 // This access disables the DCDC. 448 // This access disables the DCDC.
452 ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data); 449 ABB_WriteRegister(VRPCCTRL3, vrpcctrl3_data);
453 } 450 }
454 451
455 /* ************************ SELECTION OF TEST MODE FOR ABB **************************************** */ 452 /* ************************ SELECTION OF TEST MODE FOR ABB **************************************** */
456 /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins */ 453 /* This test configuration allows visibility on BULENA,BULON,BDLON,BDLENA on test pins */
457 /* ***************************************************************************************************/ 454 /* ***************************************************************************************************/
458 #if (BOARD==6)&& (ANLG_FAM==1) //BUG01967 to remove access to TAPCTRL (EVA4 board and Nausica) 455 #if (BOARD==6)&& (ANLG_FAM==1) //BUG01967 to remove access to TAPCTRL (EVA4 board and Nausica)
459 // This transmission enables Omega test register. 456 // This transmission enables Omega test register.
460 ABB_WriteRegister(TAPCTRL, 0x01); 457 ABB_WriteRegister(TAPCTRL, 0x01);
461 458
462 // This transmission select Omega test instruction. 459 // This transmission select Omega test instruction.
463 ABB_WriteRegister(TAPREG, TSPTEST1); 460 ABB_WriteRegister(TAPREG, TSPTEST1);
464 461
465 // This transmission disables Omega test register. 462 // This transmission disables Omega test register.
466 ABB_WriteRegister(TAPCTRL, 0x00); 463 ABB_WriteRegister(TAPCTRL, 0x00);
467 #endif 464 #endif
468 /* *************************************************************************************************** */ 465 /* *************************************************************************************************** */
469 466
470 if (!bRecoveryFlag) // Check recovery status from L1, prevent G23 SIM issue 467 if (!bRecoveryFlag) // Check recovery status from L1, prevent G23 SIM issue
471 { 468 {
472 // This transmission changes SIM power supply to 3 volts. 469 // This transmission changes SIM power supply to 3 volts.
473 ABB_WriteRegister(VRPCCTRL1, 0x45); 470 ABB_WriteRegister(VRPCCTRL1, 0x45);
474 } 471 }
475 472
476 ABB_SetPage(PAGE0); 473 ABB_SetPage(PAGE0);
477 474
478 // This transmission enables selected OMEGA modules. 475 // This transmission enables selected OMEGA modules.
479 ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6); 476 ABB_WriteRegister(TOGBR1, (modules & ~DCDC) >> 6);
480 477
481 if(modules & MADC) // check if the ADC is enabled 478 if(modules & MADC) // check if the ADC is enabled
482 { 479 {
483 // This transmission connects the resistive divider to MB and BB. 480 // This transmission connects the resistive divider to MB and BB.
484 ABB_WriteRegister(BCICTL1, 0x0005); 481 ABB_WriteRegister(BCICTL1, 0x0005);
485 } 482 }
486 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) 483 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
487 // Restore the ABB checks and debouncing if start on TESTRESETZ 484 // Restore the ABB checks and debouncing if start on TESTRESETZ
488 485
489 // This transmission changes the register page in the ABB for usp to pg1. 486 // This transmission changes the register page in the ABB for usp to pg1.
490 ABB_SetPage(PAGE1); 487 ABB_SetPage(PAGE1);
491 488
492 // This transmission sets the AFCCK to CKIN/2. 489 // This transmission sets the AFCCK to CKIN/2.
493 ABB_WriteRegister(AFCCTLADD, 0x01); 490 ABB_WriteRegister(AFCCTLADD, 0x01);
494 491
495 // This transmission enables the tapreg. 492 // This transmission enables the tapreg.
496 ABB_WriteRegister(TAPCTRL, 0x01); 493 ABB_WriteRegister(TAPCTRL, 0x01);
497 494
498 // This transmission enables access to page 2. 495 // This transmission enables access to page 2.
499 ABB_WriteRegister(TAPREG, 0x01b); 496 ABB_WriteRegister(TAPREG, 0x01b);
500 497
501 // This transmission changes the register page in the ABB for usp to pg2. 498 // This transmission changes the register page in the ABB for usp to pg2.
502 ABB_SetPage(PAGE2); 499 ABB_SetPage(PAGE2);
503 500
504 #if (ANLG_FAM == 2) 501 #if (ANLG_FAM == 2)
514 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE 511 #if (ANLG_PG == S_PG_10) // SYREN PG1.0 ON ESAMPLE
515 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register 512 ABB_WriteRegister(BBCFG, C_BBCFG); // Initialize transmit register
516 #endif 513 #endif
517 // This transmission enables access to page 0. 514 // This transmission enables access to page 0.
518 ABB_SetPage(PAGE0); 515 ABB_SetPage(PAGE0);
519 516
520 // reset bit MSKINT1 , if set by TESTRESET 517 // reset bit MSKINT1 , if set by TESTRESET
521 reg=ABB_ReadRegister(VRPCSTS) & 0xffe; 518 reg=ABB_ReadRegister(VRPCSTS) & 0xffe;
522 519
523 ABB_WriteRegister(VRPCSTS, reg); 520 ABB_WriteRegister(VRPCSTS, reg);
524 521
525 ABB_SetPage(PAGE2); 522 ABB_SetPage(PAGE2);
526 523
527 // Restore default for BG behavior in sleep mode 524 // Restore default for BG behavior in sleep mode
528 ABB_WriteRegister(VRPCAUX, 0xBF); 525 ABB_WriteRegister(VRPCAUX, 0xBF);
529 526
530 // Restore default for deboucing length 527 // Restore default for deboucing length
531 ABB_WriteRegister(VRPCLDO, 0x00F); 528 ABB_WriteRegister(VRPCLDO, 0x00F);
532 529
533 // Restore default for INT1 generation, wait time in switch on, checks in switch on 530 // Restore default for INT1 generation, wait time in switch on, checks in switch on
534 ABB_WriteRegister(VRPCABBTST, 0x0002); 531 ABB_WriteRegister(VRPCABBTST, 0x0002);
535 532
536 #endif 533 #endif
537 534
538 // This transmission changes the register page in the ABB for usp to pg1. 535 // This transmission changes the register page in the ABB for usp to pg1.
539 ABB_SetPage(PAGE1); 536 ABB_SetPage(PAGE1);
540 537
541 // This transmission sets tapinst to id code. 538 // This transmission sets tapinst to id code.
542 ABB_WriteRegister(TAPREG, 0x0001); 539 ABB_WriteRegister(TAPREG, 0x0001);
543 540
544 // This transmission disables TAPREG access. 541 // This transmission disables TAPREG access.
545 ABB_WriteRegister(TAPCTRL, 0x00); 542 ABB_WriteRegister(TAPCTRL, 0x00);
546 543
547 // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows 544 // enable BB battery charge BCICONF register, enable test mode to track BDLEN and BULEN windows
548 // This transmission enables BB charge and BB bridge connection for BB measurements. 545 // This transmission enables BB charge and BB bridge connection for BB measurements.
549 #if ENABLE_BACKUP_BATTERY 546 #if ENABLE_BACKUP_BATTERY
550 ABB_WriteRegister(BCICONF, 0x060); 547 ABB_WriteRegister(BCICONF, 0x060);
560 #endif 557 #endif
561 558
562 /* ************************ SELECTION OF TEST MODE FOR ABB ******************************************/ 559 /* ************************ SELECTION OF TEST MODE FOR ABB ******************************************/
563 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ 560 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */
564 /* ****************************************************************************************************/ 561 /* ****************************************************************************************************/
565 562
566 // This transmission enables the tapreg. 563 // This transmission enables the tapreg.
567 ABB_WriteRegister(TAPCTRL, 0x01); 564 ABB_WriteRegister(TAPCTRL, 0x01);
568 565
569 // This transmission select ABB test instruction. 566 // This transmission select ABB test instruction.
570 ABB_WriteRegister(TAPREG, TSPEN); 567 ABB_WriteRegister(TAPREG, TSPEN);
571 568
572 // This transmission changes the register page in ABB for usp to pg0. 569 // This transmission changes the register page in ABB for usp to pg0.
573 ABB_SetPage(PAGE0); 570 ABB_SetPage(PAGE0);
574 571
575 // This transmission enables selected ABB modules. 572 // This transmission enables selected ABB modules.
576 ABB_WriteRegister(TOGBR1, modules >> 6); 573 ABB_WriteRegister(TOGBR1, modules >> 6);
577 574
578 // enable MB & BB resistive bridges for measurements 575 // enable MB & BB resistive bridges for measurements
579 if(modules & MADC) // check if the ADC is enabled 576 if(modules & MADC) // check if the ADC is enabled
580 { 577 {
581 // This transmission connects the resistive divider to MB and BB. 578 // This transmission connects the resistive divider to MB and BB.
582 ABB_WriteRegister(BCICTL1, 0x0001); 579 ABB_WriteRegister(BCICTL1, 0x0001);
583 } 580 }
584 581
585 /********* Sleep definition part ******************/ 582 /********* Sleep definition part ******************/
586 // This transmission changes the register page in the ABB for usp to pg1. 583 // This transmission changes the register page in the ABB for usp to pg1.
587 #if (ANLG_FAM == 2) 584 #if (ANLG_FAM == 2)
588 ABB_SetPage(PAGE1); 585 ABB_SetPage(PAGE1);
589 586
590 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. 587 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
591 reg = ABB_ReadRegister(VRPCCFG) & 0x1e0; 588 reg = ABB_ReadRegister(VRPCCFG) & 0x1e0;
592 589
593 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg)); 590 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg));
594 591
595 // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value. 592 // update the ABB mask sleep register (regulator disabled in deep sleep), and clear previous mask value.
596 reg = ABB_ReadRegister(VRPCMSK) & 0x1e0; 593 reg = ABB_ReadRegister(VRPCMSK) & 0x1e0;
597 ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg)); 594 ABB_WriteRegister(VRPCMSK, (MASK_SLEEP_MODE | reg));
598 #elif (ANLG_FAM == 3) 595 #elif (ANLG_FAM == 3)
599 Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY); 596 Syren_Sleep_Config(NORMAL_SLEEP,SLEEP_BG,SLPDLY);
600 #endif 597 #endif
601 // This transmission changes the register page in the ABB for usp to pg0. 598 // This transmission changes the register page in the ABB for usp to pg0.
602 ABB_SetPage(PAGE0); 599 ABB_SetPage(PAGE0);
603 #endif 600 #endif
604 601
605 // SW workaround for initialization of the audio parts of the ABB to avoid white noise 602 // SW workaround for initialization of the audio parts of the ABB to avoid white noise
606 // C.f. BUG1941 603 // C.f. BUG1941
607 // Set VDLR and VULR bits 604 // Set VDLR and VULR bits
608 // Write TOGBR1 register 605 // Write TOGBR1 register
609 // This transmission enables selected ABB modules. 606 // This transmission enables selected ABB modules.
610 ABB_WriteRegister(TOGBR1, 0x0A); 607 ABB_WriteRegister(TOGBR1, 0x0A);
611 608
612 // wait for 1 ms 609 // wait for 1 ms
613 wait_ARM_cycles(convert_nanosec_to_cycles(1000000)); 610 wait_ARM_cycles(convert_nanosec_to_cycles(1000000));
614 611
615 // Reset VDLS and VULS bits 612 // Reset VDLS and VULS bits
616 // Write TOGBR1 register 613 // Write TOGBR1 register
617 // This transmission enables selected ABB modules. 614 // This transmission enables selected ABB modules.
618 ABB_WriteRegister(TOGBR1, 0x05); 615 ABB_WriteRegister(TOGBR1, 0x05);
619 616
620 #if (ABB_SEMAPHORE_PROTECTION == 3) 617 // Stop the SPI clock
621 // release the semaphore only if it has correctly been created.
622 if(&abb_sem != 0)
623 {
624 NU_Release_Semaphore(&abb_sem);
625 }
626 #endif // ABB_SEMAPHORE_PROTECTION
627
628 // Stop the SPI clock
629 #ifdef SPI_CLK_LOW_POWER 618 #ifdef SPI_CLK_LOW_POWER
630 SPI_CLK_DISABLE 619 SPI_CLK_DISABLE
631 #endif 620 #endif
632 } 621
633 622 #if (ABB_SEMAPHORE_PROTECTION == 3)
623 // release the semaphore only if it has correctly been created.
624 if(sem_status == NU_SUCCESS)
625 {
626 NU_Release_Semaphore(&abb_sem);
627 }
628 #endif // ABB_SEMAPHORE_PROTECTION
629 }
634 630
635 631
636 /*-----------------------------------------------------------------------*/ 632 /*-----------------------------------------------------------------------*/
637 /* ABB_Read_ADC() */ 633 /* ABB_Read_ADC() */
638 /* */ 634 /* */
639 /* This function manages all the spi serial transfer to read all the */ 635 /* This function manages all the spi serial transfer to read all the */
640 /* ABB ADC conversion channels. */ 636 /* ABB ADC conversion channels. */
641 /* Stores the result in Buff parameter. */ 637 /* Stores the result in Buff parameter. */
642 /* */ 638 /* */
643 /*-----------------------------------------------------------------------*/ 639 /*-----------------------------------------------------------------------*/
644 void ABB_Read_ADC(SYS_UWORD16 *Buff) 640 void ABB_Read_ADC(SYS_UWORD16 *Buff)
645 { 641 {
646 volatile SYS_UWORD16 status; 642 volatile SYS_UWORD16 status;
647 643 STATUS sem_status;
648 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 644
645 #if (ABB_SEMAPHORE_PROTECTION == 3)
646
647 // check if the semaphore has been correctly created and try to obtain it.
648 // if the semaphore cannot be obtained, the task is suspended and then resumed
649 // as soon as the semaphore is released.
650
651 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
652
653 #endif // ABB_SEMAPHORE_PROTECTION
654
655 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
649 SPI_Ready_for_RDWR 656 SPI_Ready_for_RDWR
650 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 657 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
651
652 #if (ABB_SEMAPHORE_PROTECTION == 3)
653
654 // check if the semaphore has been correctly created and try to obtain it.
655 // if the semaphore cannot be obtained, the task is suspended and then resumed
656 // as soon as the semaphore is released.
657 if(&abb_sem != 0)
658 {
659 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
660 }
661 #endif // ABB_SEMAPHORE_PROTECTION
662 658
663 // This transmission changes the register page in the ABB for usp to pg0. 659 // This transmission changes the register page in the ABB for usp to pg0.
664 ABB_SetPage(PAGE0); 660 ABB_SetPage(PAGE0);
665 661
666 /* Read all ABB ADC registers */ 662 /* Read all ABB ADC registers */
670 *Buff++ = ABB_ReadRegister(VBKPREG); 666 *Buff++ = ABB_ReadRegister(VBKPREG);
671 *Buff++ = ABB_ReadRegister(ADIN1REG); 667 *Buff++ = ABB_ReadRegister(ADIN1REG);
672 *Buff++ = ABB_ReadRegister(ADIN2REG); 668 *Buff++ = ABB_ReadRegister(ADIN2REG);
673 *Buff++ = ABB_ReadRegister(ADIN3REG); 669 *Buff++ = ABB_ReadRegister(ADIN3REG);
674 670
675 #if (ANLG_FAM ==1) 671 #if (ANLG_FAM == 1)
676 *Buff++ = ABB_ReadRegister(ADIN4XREG); 672 *Buff++ = ABB_ReadRegister(ADIN4XREG);
677 *Buff++ = ABB_ReadRegister(ADIN5YREG); 673 *Buff++ = ABB_ReadRegister(ADIN5YREG);
678 #elif (ANLG_FAM ==2) 674 #elif (ANLG_FAM == 2)
679 *Buff++ = ABB_ReadRegister(ADIN4REG); 675 *Buff++ = ABB_ReadRegister(ADIN4REG);
680 #elif (ANLG_FAM == 3) 676 #elif (ANLG_FAM == 3)
681 *Buff++ = ABB_ReadRegister(ADIN4REG); 677 *Buff++ = ABB_ReadRegister(ADIN4REG);
682 *Buff++ = ABB_ReadRegister(ADIN5REG); 678 *Buff++ = ABB_ReadRegister(ADIN5REG);
683 #endif // ANLG_FAM 679 #endif // ANLG_FAM
684 680
685 #if (ABB_SEMAPHORE_PROTECTION == 3)
686 // release the semaphore only if it has correctly been created.
687 if(&abb_sem != 0)
688 {
689 NU_Release_Semaphore(&abb_sem);
690 }
691 #endif // ABB_SEMAPHORE_PROTECTION
692
693 // Stop the SPI clock 681 // Stop the SPI clock
694 #ifdef SPI_CLK_LOW_POWER 682 #ifdef SPI_CLK_LOW_POWER
695 SPI_CLK_DISABLE 683 SPI_CLK_DISABLE
696 #endif 684 #endif
697 } 685
698 686 #if (ABB_SEMAPHORE_PROTECTION == 3)
687 // release the semaphore only if it has correctly been created.
688 if(sem_status == NU_SUCCESS)
689 {
690 NU_Release_Semaphore(&abb_sem);
691 }
692 #endif // ABB_SEMAPHORE_PROTECTION
693 }
699 694
700 695
701 /*-----------------------------------------------------------------------*/ 696 /*-----------------------------------------------------------------------*/
702 /* ABB_Conf_ADC() */ 697 /* ABB_Conf_ADC() */
703 /* */ 698 /* */
704 /* This function manages all the spi serial transfer to: */ 699 /* This function manages all the spi serial transfer to: */
705 /* - select the ABB ADC channels to be converted */ 700 /* - select the ABB ADC channels to be converted */
706 /* - enable/disable EOC interrupt */ 701 /* - enable/disable EOC interrupt */
707 /* */ 702 /* */
708 /*-----------------------------------------------------------------------*/ 703 /*-----------------------------------------------------------------------*/
709 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal) 704 void ABB_Conf_ADC(SYS_UWORD16 Channels, SYS_UWORD16 ItVal)
710 { 705 {
711 volatile SYS_UWORD16 status; 706 volatile SYS_UWORD16 status;
707 STATUS sem_status;
712 SYS_UWORD16 reg_val; 708 SYS_UWORD16 reg_val;
713 709
714 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 710 #if (ABB_SEMAPHORE_PROTECTION == 3)
711
712 // check if the semaphore has been correctly created and try to obtain it.
713 // if the semaphore cannot be obtained, the task is suspended and then resumed
714 // as soon as the semaphore is released.
715
716 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
717
718 #endif // ABB_SEMAPHORE_PROTECTION
719
720 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
715 SPI_Ready_for_RDWR 721 SPI_Ready_for_RDWR
716 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 722 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
717
718 #if (ABB_SEMAPHORE_PROTECTION == 3)
719
720 // check if the semaphore has been correctly created and try to obtain it.
721 // if the semaphore cannot be obtained, the task is suspended and then resumed
722 // as soon as the semaphore is released.
723 if(&abb_sem != 0)
724 {
725 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
726 }
727 #endif // ABB_SEMAPHORE_PROTECTION
728 723
729 // This transmission changes the register page in the ABB for usp to pg0. 724 // This transmission changes the register page in the ABB for usp to pg0.
730 ABB_SetPage(PAGE0); 725 ABB_SetPage(PAGE0);
731 726
732 /* select ADC channels to be converted */ 727 /* select ADC channels to be converted */
733 #if (ANLG_FAM == 1) 728 #if (ANLG_FAM == 1)
734 ABB_WriteRegister(MADCCTRL1, Channels); 729 ABB_WriteRegister(MADCCTRL1, Channels);
735 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3)) 730 #elif ((ANLG_FAM == 2) || (ANLG_FAM == 3))
736 ABB_WriteRegister(MADCCTRL, Channels); 731 ABB_WriteRegister(MADCCTRL, Channels);
737 #endif 732 #endif
738 733
739 reg_val = ABB_ReadRegister(ITMASK); 734 reg_val = ABB_ReadRegister(ITMASK);
740 735
741 // This transmission configure the End Of Conversion IT without modifying other bits in the same register. 736 // This transmission configure the End Of Conversion IT without modifying other bits in the same register.
742 if(ItVal == EOC_INTENA) 737 if(ItVal == EOC_INTENA)
743 ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA); 738 ABB_WriteRegister(ITMASK, reg_val & EOC_INTENA);
744 else if(ItVal == EOC_INTMASK) 739 else if(ItVal == EOC_INTMASK)
745 ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK); 740 ABB_WriteRegister(ITMASK, reg_val | EOC_INTMASK);
746
747 #if (ABB_SEMAPHORE_PROTECTION == 3)
748 // release the semaphore only if it has correctly been created.
749 if(&abb_sem != 0)
750 {
751 NU_Release_Semaphore(&abb_sem);
752 }
753 #endif // ABB_SEMAPHORE_PROTECTION
754 741
755 // Stop the SPI clock 742 // Stop the SPI clock
756 #ifdef SPI_CLK_LOW_POWER 743 #ifdef SPI_CLK_LOW_POWER
757 SPI_CLK_DISABLE 744 SPI_CLK_DISABLE
758 #endif 745 #endif
759 } 746
760 747 #if (ABB_SEMAPHORE_PROTECTION == 3)
761 748 // release the semaphore only if it has correctly been created.
749 if(sem_status == NU_SUCCESS)
750 {
751 NU_Release_Semaphore(&abb_sem);
752 }
753 #endif // ABB_SEMAPHORE_PROTECTION
754 }
762 755
763 756
764 /*------------------------------------------------------------------------*/ 757 /*------------------------------------------------------------------------*/
765 /* ABB_sleep() */ 758 /* ABB_sleep() */
766 /* */ 759 /* */
767 /* This function disables the DCDC and returns to PAGE 0. It stops then */ 760 /* This function disables the DCDC and returns to PAGE 0. It stops then */
768 /* the 13MHz clock in ABB. A wait loop s required to allow */ 761 /* the 13MHz clock in ABB. A wait loop s required to allow */
769 /* first slow access to ABB clock register. */ 762 /* first slow access to ABB clock register. */
770 /* */ 763 /* */
771 /* WARNING !! : this function must not be protected by semaphore !! */ 764 /* WARNING !! : this function must not be protected by semaphore !! */
772 /* */ 765 /* */
773 /* Returns AFC value. */ 766 /* Returns AFC value. */
774 /* */ 767 /* */
775 /*------------------------------------------------------------------------*/ 768 /*------------------------------------------------------------------------*/
776 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) 769 SYS_UWORD32 ABB_sleep(SYS_UWORD8 sleep_performed, SYS_WORD16 afc)
777 { 770 {
778 volatile SYS_UWORD16 status; 771 volatile SYS_UWORD16 status;
779 SYS_UWORD32 afcout_index; 772 SYS_UWORD32 afcout_index;
780 volatile SYS_UWORD16 nb_it; 773 volatile SYS_UWORD16 nb_it;
782 775
783 // table for AFC allowed values during Sleep mode. First 5th elements 776 // table for AFC allowed values during Sleep mode. First 5th elements
784 // are related to positive AFC values, last 5th to negative ones. 777 // are related to positive AFC values, last 5th to negative ones.
785 SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f}; 778 SYS_UWORD32 Afcout_T[10]= {0x0f,0x1f,0x3f,0x7f,0xff,0x00,0x01,0x03,0x07,0x0f};
786 779
787 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 780 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
788 SPI_Ready_for_RDWR 781 SPI_Ready_for_RDWR
789 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 782 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
790 783
791 // COMPUTATION AND PROGRAMMING OF AFC VALUE 784 // COMPUTATION AND PROGRAMMING OF AFC VALUE
792 //--------------------------------------------------- 785 //---------------------------------------------------
793 if(afc & 0x1000) 786 if(afc & 0x1000)
794 afcout_index = ((afc + 512)>>10) + 1; 787 afcout_index = ((afc + 512)>>10) + 1;
795 else 788 else
796 afcout_index = (afc + 512)>>10; 789 afcout_index = (afc + 512)>>10;
797 790
798 if (sleep_performed == FRAME_STOP) // Big sleep 791 if (sleep_performed == FRAME_STOP) // Big sleep
799 { 792 {
800 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) 793 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
801 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP //////////////////////////// 794 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP ////////////////////////////
802 #endif 795 #endif
803 796
804 } 797 }
805 else // Deep sleep 798 else // Deep sleep
806 { 799 {
807 #if(ANLG_FAM == 1) 800 #if(ANLG_FAM == 1)
808 // SELECTION OF AFC TEST MODE FOR OMEGA 801 // SELECTION OF AFC TEST MODE FOR OMEGA
809 //--------------------------------------------------- 802 //---------------------------------------------------
810 // This test configuration allows access on the AFCOUT register 803 // This test configuration allows access on the AFCOUT register
811 ABB_SetPage(PAGE1); 804 ABB_SetPage(PAGE1);
812 805
813 // This transmission enables OMEGA test register. 806 // This transmission enables OMEGA test register.
814 ABB_WriteRegister(TAPCTRL, 0x01); 807 ABB_WriteRegister(TAPCTRL, 0x01);
815 808
816 // This transmission selects OMEGA test instruction. 809 // This transmission selects OMEGA test instruction.
817 ABB_WriteRegister(TAPREG, AFCTEST); 810 ABB_WriteRegister(TAPREG, AFCTEST);
818 811
819 // Set AFCOUT to 0. 812 // Set AFCOUT to 0.
820 ABB_WriteRegister(AFCOUT, 0x00 >> 6); 813 ABB_WriteRegister(AFCOUT, 0x00 >> 6);
821 814
822 ABB_SetPage(PAGE0); 815 ABB_SetPage(PAGE0);
823 816
824 #elif (ANLG_FAM == 2) 817 #elif (ANLG_FAM == 2)
825 // This configuration allows access on the AFCOUT register 818 // This configuration allows access on the AFCOUT register
826 ABB_SetPage(PAGE1); 819 ABB_SetPage(PAGE1);
827 820
828 // Read AFCCTLADD value and enable USP access to AFCOUT register 821 // Read AFCCTLADD value and enable USP access to AFCOUT register
829 reg_val = (ABB_ReadRegister(AFCCTLADD) | 0x04); 822 reg_val = (ABB_ReadRegister(AFCCTLADD) | 0x04);
830 823
831 ABB_WriteRegister(AFCCTLADD, reg_val); 824 ABB_WriteRegister(AFCCTLADD, reg_val);
832 825
833 // Set AFCOUT to 0. 826 // Set AFCOUT to 0.
834 ABB_WriteRegister(AFCOUT, 0x00); 827 ABB_WriteRegister(AFCOUT, 0x00);
835 828
836 #if ENABLE_BACKUP_BATTERY 829 #if ENABLE_BACKUP_BATTERY
837 // Read BCICONF value and cut the measurement bridge of BB cut the BB charge. 830 // Read BCICONF value and cut the measurement bridge of BB cut the BB charge.
838 reg_val = ABB_ReadRegister(BCICONF) & 0x039f; 831 reg_val = ABB_ReadRegister(BCICONF) & 0x039f;
839 832
840 ABB_WriteRegister(BCICONF, reg_val); 833 ABB_WriteRegister(BCICONF, reg_val);
841 #endif 834 #endif
842 835
843 // Disable the ABB test mode 836 // Disable the ABB test mode
844 ABB_WriteRegister(TAPCTRL, 0x00); 837 ABB_WriteRegister(TAPCTRL, 0x00);
845 838
846 ABB_SetPage(PAGE0); 839 ABB_SetPage(PAGE0);
847 840
848 // Read BCICTL1 value and cut the measurement bridge of MB. 841 // Read BCICTL1 value and cut the measurement bridge of MB.
849 reg_val = ABB_ReadRegister(BCICTL1) & 0x03fe; 842 reg_val = ABB_ReadRegister(BCICTL1) & 0x03fe;
850 843
851 ABB_WriteRegister(BCICTL1, reg_val); 844 ABB_WriteRegister(BCICTL1, reg_val);
852 #endif 845 #endif
853 846
854 #if (ANLG_FAM == 3) // Nothing to be done as MB and BB measurement bridges are automatically disconnected 847 #if (ANLG_FAM == 3) // Nothing to be done as MB and BB measurement bridges are automatically disconnected
855 // in Syren during sleep mode. BB charge stays enabled 848 // in Syren during sleep mode. BB charge stays enabled
856 ABB_SetPage(PAGE1); // Initialize transmit reg_num. This transmission 849 ABB_SetPage(PAGE1); // Initialize transmit reg_num. This transmission
857 // change the register page in IOTA for usp to pg1 850 // change the register page in IOTA for usp to pg1
858 851
859 ABB_WriteRegister(TAPCTRL, 0x00); // Disable Syren test mode 852 ABB_WriteRegister(TAPCTRL, 0x00); // Disable Syren test mode
860 853
861 ABB_SetPage(PAGE0); 854 ABB_SetPage(PAGE0);
862 #endif 855 #endif
863 856
864 // switch off MADC, AFC, AUXDAC, VOICE. 857 // switch off MADC, AFC, AUXDAC, VOICE.
865 ABB_WriteRegister(TOGBR1, 0x155); 858 ABB_WriteRegister(TOGBR1, 0x155);
866 859
867 // Switch off Analog supply LDO 860 // Switch off Analog supply LDO
868 //----------------------------- 861 //-----------------------------
869 #if (ANLG_FAM == 1) 862 #if (ANLG_FAM == 1)
870 ABB_SetPage(PAGE1); 863 ABB_SetPage(PAGE1);
871 864
872 // Read VRPCCTL3 register value and switch off VR3. 865 // Read VRPCCTL3 register value and switch off VR3.
873 reg_val = ABB_ReadRegister(VRPCCTRL3) & 0x3df; 866 reg_val = ABB_ReadRegister(VRPCCTRL3) & 0x3df;
874 867
875 ABB_WriteRegister(VRPCCTRL3, reg_val); 868 ABB_WriteRegister(VRPCCTRL3, reg_val);
876 869
877 #elif (ANLG_FAM == 2) 870 #elif (ANLG_FAM == 2)
878 // Read VRPCSTS register value and extract status of meaningfull inputs. 871 // Read VRPCSTS register value and extract status of meaningfull inputs.
879 reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070; 872 reg_val = ABB_ReadRegister(VRPCSTS) & 0x0070;
880 873
881 #ifdef CONFIG_TARGET_LUNA 874 #ifdef ABB_SLEEP_RESTRICTION
882 if (reg_val == 0x30 && ABB_sleep_allowed) 875 if (reg_val == 0x30 && ABB_sleep_allowed)
883 #else 876 #else
884 if (reg_val == 0x30) 877 if (reg_val == 0x30)
885 #endif 878 #endif
886 { 879 {
887 // start the SLPDLY counter in order to switch the ABB in sleep mode. This transmission sets IOTA sleep bit. 880 // start the SLPDLY counter in order to switch the ABB in sleep mode. This transmission sets IOTA sleep bit.
888 ABB_WriteRegister(VRPCDEV, 0x02); 881 ABB_WriteRegister(VRPCDEV, 0x02);
889 } 882 }
890 883
891 // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read". 884 // Dummy transmission to clean of ABB bus. This transmission accesses IOTA address 0 in "read".
892 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); 885 ABB_WriteRegister(0x0000 | 0x0001, 0x0000);
893 886
894 #elif (ANLG_FAM == 3) 887 #elif (ANLG_FAM == 3)
895 // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed 888 // In Syren there is no need to check for VRPCCFG as wake up prioritys are changed
896 // start the SLPDLY counter in order to switch the ABB in sleep mode 889 // start the SLPDLY counter in order to switch the ABB in sleep mode
897 ABB_WriteRegister(VRPCDEV,0x02); // Initialize transmit reg_num. This transmission 890 ABB_WriteRegister(VRPCDEV,0x02); // Initialize transmit reg_num. This transmission
898 // set Syren sleep bit 891 // set Syren sleep bit
899 /* 892 /*
900 // Dummy transmission to clean of ABB bus. This transmission accesses SYREN address 0 in "read". 893 // Dummy transmission to clean of ABB bus. This transmission accesses SYREN address 0 in "read".
901 ABB_WriteRegister(0x0000 | 0x0001, 0x0000); 894 ABB_WriteRegister(0x0000 | 0x0001, 0x0000);
902 */ 895 */
903 #endif 896 #endif
904 897
905 // Switch to low frequency clock 898 // Switch to low frequency clock
906 ABB_stop_13M(); 899 ABB_stop_13M();
907 } 900 }
908 901
909 // Stop the SPI clock 902 // Stop the SPI clock
910 #ifdef SPI_CLK_LOW_POWER 903 #ifdef SPI_CLK_LOW_POWER
925 918
926 919
927 /*------------------------------------------------------------------------*/ 920 /*------------------------------------------------------------------------*/
928 /* ABB_wakeup() */ 921 /* ABB_wakeup() */
929 /* */ 922 /* */
930 /* This function sets the 13MHz clock working in ABB. A wait loop */ 923 /* This function sets the 13MHz clock working in ABB. A wait loop */
931 /* is required to allow first slow access to ABB clock register. */ 924 /* is required to allow first slow access to ABB clock register. */
932 /* Then it re-enables DCDC and returns to PAGE 0. */ 925 /* Then it re-enables DCDC and returns to PAGE 0. */
933 /* */ 926 /* */
934 /* WARNING !! : this function must not be protected by semaphore !! */ 927 /* WARNING !! : this function must not be protected by semaphore !! */
935 /* */ 928 /* */
936 /*------------------------------------------------------------------------*/ 929 /*------------------------------------------------------------------------*/
937 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc) 930 void ABB_wakeup(SYS_UWORD8 sleep_performed, SYS_WORD16 afc)
938 { 931 {
939 volatile SYS_UWORD16 status; 932 volatile SYS_UWORD16 status;
940 SYS_UWORD16 reg_val; 933 SYS_UWORD16 reg_val;
941 934
942 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags. 935 // Start spi clock, mask IT for RD and WR and read SPI_REG_STATUS to reset the RE and WE flags.
943 SPI_Ready_for_RDWR 936 SPI_Ready_for_RDWR
944 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 937 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
945 938
946 if (sleep_performed == FRAME_STOP) // Big sleep 939 if (sleep_performed == FRAME_STOP) // Big sleep
947 { 940 {
948 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3)) 941 #if ((ANLG_FAM == 2) || (ANLG_FAM == 3))
949 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP //////////////////////////// 942 //////////// ADD HERE IOTA or SYREN CONFIGURATION FOR BIG SLEEP WAKEUP ////////////////////////////
950 #endif 943 #endif
951 } 944 }
952 else // Deep sleep 945 else // Deep sleep
953 { 946 {
954 #if (OP_L1_STANDALONE == 1) 947 #if (OP_L1_STANDALONE == 1)
955 #if (CHIPSET == 12) 948 #if (CHIPSET == 12)
956 // restore context from 949 // restore context from
957 // workaround to set APLL_DIV_CLK( internal PU) at high level 950 // workaround to set APLL_DIV_CLK( internal PU) at high level
958 // by default APLL_DIV_CLK is low pulling 80uA on VRIO 951 // by default APLL_DIV_CLK is low pulling 80uA on VRIO
959 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x00;//CNTL_APLL_DIV_CLK -> APLL_DIV_CLK != 0 952 // *(SYS_UWORD16*) (0xFFFFFD90)= 0x00;//CNTL_APLL_DIV_CLK -> APLL_DIV_CLK != 0
960 // *(SYS_UWORD16*) (0xFFFEF030)= 0x00;// DPLL mode 953 // *(SYS_UWORD16*) (0xFFFEF030)= 0x00;// DPLL mode
961 #endif 954 #endif
963 956
964 // Restitutes 13MHZ Clock to ABB 957 // Restitutes 13MHZ Clock to ABB
965 ABB_free_13M(); 958 ABB_free_13M();
966 959
967 // Switch ON Analog supply LDO 960 // Switch ON Analog supply LDO
968 #if (ANLG_FAM == 1) 961 #if (ANLG_FAM == 1)
969 ABB_SetPage(PAGE1); 962 ABB_SetPage(PAGE1);
970 963
971 // Read VRPCCTL3 register value and switch on VR3. 964 // Read VRPCCTL3 register value and switch on VR3.
972 reg_val = ABB_ReadRegister(VRPCCTRL3) | 0x020; 965 reg_val = ABB_ReadRegister(VRPCCTRL3) | 0x020;
973 966
974 ABB_WriteRegister(VRPCCTRL3, reg_val); 967 ABB_WriteRegister(VRPCCTRL3, reg_val);
975 ABB_SetPage(PAGE0); 968 ABB_SetPage(PAGE0);
976 #endif 969 #endif
977 970
978 // This transmission switches on MADC, AFC. 971 // This transmission switches on MADC, AFC.
979 ABB_WriteRegister(TOGBR1, 0x280); 972 ABB_WriteRegister(TOGBR1, 0x280);
980 973
981 // This transmission sets the AUXAFC2. 974 // This transmission sets the AUXAFC2.
982 ABB_WriteRegister(AUXAFC2, ((afc>>10) & 0x7)); 975 ABB_WriteRegister(AUXAFC2, ((afc>>10) & 0x7));
983 976
984 // This transmission sets the AUXAFC1. 977 // This transmission sets the AUXAFC1.
985 ABB_WriteRegister(AUXAFC1, (afc & 0x3ff)); 978 ABB_WriteRegister(AUXAFC1, (afc & 0x3ff));
986 979
987 #if (ANLG_FAM == 1) 980 #if (ANLG_FAM == 1)
988 // Remove AFC test mode 981 // Remove AFC test mode
989 ABB_SetPage(PAGE1); 982 ABB_SetPage(PAGE1);
990 983
991 // This transmission select Omega test instruction. 984 // This transmission select Omega test instruction.
992 ABB_WriteRegister(TAPREG, TSPTEST1); 985 ABB_WriteRegister(TAPREG, TSPTEST1);
993 986
994 // Disable test mode selection 987 // Disable test mode selection
995 // This transmission disables Omega test register. 988 // This transmission disables Omega test register.
996 ABB_WriteRegister(TAPCTRL, 0x00 >> 6); 989 ABB_WriteRegister(TAPCTRL, 0x00 >> 6);
997 990
998 ABB_SetPage(PAGE0); 991 ABB_SetPage(PAGE0);
999 992
1000 #elif (ANLG_FAM == 2) 993 #elif (ANLG_FAM == 2)
1001 ABB_SetPage(PAGE1); 994 ABB_SetPage(PAGE1);
1002 995
1003 // Read AFCCTLADD register value and disable USP access to AFCOUT register. 996 // Read AFCCTLADD register value and disable USP access to AFCOUT register.
1004 reg_val = ABB_ReadRegister(AFCCTLADD) & ~0x04; 997 reg_val = ABB_ReadRegister(AFCCTLADD) & ~0x04;
1005 998
1006 ABB_WriteRegister(AFCCTLADD, reg_val); 999 ABB_WriteRegister(AFCCTLADD, reg_val);
1007 1000
1008 #if ENABLE_BACKUP_BATTERY 1001 #if ENABLE_BACKUP_BATTERY
1009 // Read BCICONF register value and enable BB measurement bridge enable BB charge. 1002 // Read BCICONF register value and enable BB measurement bridge enable BB charge.
1010 reg_val = ABB_ReadRegister(BCICONF) | 0x0060; 1003 reg_val = ABB_ReadRegister(BCICONF) | 0x0060;
1011 1004
1012 ABB_WriteRegister(BCICONF, reg_val); 1005 ABB_WriteRegister(BCICONF, reg_val);
1013 #endif 1006 #endif
1014 1007
1015 1008
1016 /* *************************************************************************************************** */ 1009 /* *************************************************************************************************** */
1017 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. 1010 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
1018 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; 1011 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0;
1019 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); 1012 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val));
1020 1013
1021 // Enable the ABB test mode 1014 // Enable the ABB test mode
1022 ABB_WriteRegister(TAPCTRL, 0x01); 1015 ABB_WriteRegister(TAPCTRL, 0x01);
1023 ABB_WriteRegister(TAPREG, TSPEN); 1016 ABB_WriteRegister(TAPREG, TSPEN);
1024 ABB_SetPage(PAGE0); 1017 ABB_SetPage(PAGE0);
1025 1018
1026 // Read BCICTL1 register value and enable MB measurement bridge and cut the measurement bridge of MB. 1019 // Read BCICTL1 register value and enable MB measurement bridge and cut the measurement bridge of MB.
1027 reg_val = ABB_ReadRegister(BCICTL1) | 0x0001; 1020 reg_val = ABB_ReadRegister(BCICTL1) | 0x0001;
1028 1021
1029 ABB_WriteRegister(BCICTL1, reg_val); 1022 ABB_WriteRegister(BCICTL1, reg_val);
1030 #endif 1023 #endif
1031 1024
1032 #if (ANLG_FAM == 3) 1025 #if (ANLG_FAM == 3)
1033 1026
1034 ABB_SetPage(PAGE1); 1027 ABB_SetPage(PAGE1);
1035 1028
1036 /* *************************************************************************************************** */ 1029 /* *************************************************************************************************** */
1037 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value. 1030 // update the Delay needed by the ABB before going in deep sleep, and clear previous delay value.
1038 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0; 1031 reg_val = ABB_ReadRegister(VRPCCFG) & 0x1e0;
1039 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val)); 1032 ABB_WriteRegister(VRPCCFG, (SLPDLY | reg_val));
1040 1033
1041 /* ************************ SELECTION OF TEST MODE FOR ABB=3 *****************************************/ 1034 /* ************************ SELECTION OF TEST MODE FOR ABB=3 *****************************************/
1042 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */ 1035 /* This test configuration allows visibility on test pins TAPCTRL has not to be reset */
1043 /* ****************************************************************************************************/ 1036 /* ****************************************************************************************************/
1044 1037
1045 ABB_WriteRegister(TAPCTRL, 0x01); // Initialize the transmit register 1038 ABB_WriteRegister(TAPCTRL, 0x01); // Initialize the transmit register
1046 // This transmission enables IOTA test register 1039 // This transmission enables IOTA test register
1047 1040
1048 ABB_WriteRegister(TAPREG, TSPEN); 1041 ABB_WriteRegister(TAPREG, TSPEN);
1049 // This transmission select IOTA test instruction 1042 // This transmission select IOTA test instruction
1050 // This transmission select IOTA test instruction 1043 // This transmission select IOTA test instruction
1051 /**************************************************************************************************** */ 1044 /**************************************************************************************************** */
1052 1045
1053 ABB_SetPage(PAGE0); // Initialize transmit reg_num. This transmission 1046 ABB_SetPage(PAGE0); // Initialize transmit reg_num. This transmission
1054 #endif 1047 #endif
1055 } 1048 }
1056 1049
1057 // Stop the SPI clock 1050 // Stop the SPI clock
1058 #ifdef SPI_CLK_LOW_POWER 1051 #ifdef SPI_CLK_LOW_POWER
1059 SPI_CLK_DISABLE 1052 SPI_CLK_DISABLE
1060 #endif 1053 #endif
1064 /* ABB_wa_VRPC() */ 1057 /* ABB_wa_VRPC() */
1065 /* */ 1058 /* */
1066 /* This function initializes the VRPCCTRL1 or VRPCSIM register */ 1059 /* This function initializes the VRPCCTRL1 or VRPCSIM register */
1067 /* according to the ABB used. */ 1060 /* according to the ABB used. */
1068 /* */ 1061 /* */
1069 /*------------------------------------------------------------------------*/ 1062 /*------------------------------------------------------------------------*/
1070 void ABB_wa_VRPC(SYS_UWORD16 value) 1063 void ABB_wa_VRPC(SYS_UWORD16 value)
1071 { 1064 {
1072 volatile SYS_UWORD16 status; 1065 volatile SYS_UWORD16 status;
1073 1066 STATUS sem_status;
1074 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 1067
1068 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1069
1070 // check if the semaphore has been correctly created and try to obtain it.
1071 // if the semaphore cannot be obtained, the task is suspended and then resumed
1072 // as soon as the semaphore is released.
1073
1074 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
1075
1076 #endif // ABB_SEMAPHORE_PROTECTION
1077
1078 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
1075 SPI_Ready_for_WR 1079 SPI_Ready_for_WR
1076 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 1080 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
1077
1078 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1079
1080 // check if the semaphore has been correctly created and try to obtain it.
1081 // if the semaphore cannot be obtained, the task is suspended and then resumed
1082 // as soon as the semaphore is released.
1083 if(&abb_sem != 0)
1084 {
1085 NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
1086 }
1087 #endif // ABB_SEMAPHORE_PROTECTION
1088 1081
1089 ABB_SetPage(PAGE1); 1082 ABB_SetPage(PAGE1);
1090 1083
1091 #if (ANLG_FAM == 1) 1084 #if (ANLG_FAM == 1)
1092 // This transmission initializes the VRPCCTL1 register. 1085 // This transmission initializes the VRPCCTL1 register.
1093 ABB_WriteRegister(VRPCCTRL1, value); 1086 ABB_WriteRegister(VRPCCTRL1, value);
1094 1087
1095 #elif (ANLG_FAM == 2) 1088 #elif (ANLG_FAM == 2)
1096 // This transmission initializes the VRPCSIM register. 1089 // This transmission initializes the VRPCSIM register.
1097 ABB_WriteRegister(VRPCSIM, value); 1090 ABB_WriteRegister(VRPCSIM, value);
1098 1091
1099 #elif (ANLG_FAM == 3) 1092 #elif (ANLG_FAM == 3)
1100 // This transmission initializes the VRPCSIMR register. 1093 // This transmission initializes the VRPCSIMR register.
1101 ABB_WriteRegister(VRPCSIMR, value); 1094 ABB_WriteRegister(VRPCSIMR, value);
1102 1095
1103 #endif 1096 #endif
1104 1097
1105 ABB_SetPage(PAGE0); 1098 ABB_SetPage(PAGE0);
1106
1107 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1108 // release the semaphore only if it has correctly been created.
1109 if(&abb_sem != 0)
1110 {
1111 NU_Release_Semaphore(&abb_sem);
1112 }
1113 #endif // ABB_SEMAPHORE_PROTECTION
1114 1099
1115 // Stop the SPI clock 1100 // Stop the SPI clock
1116 #ifdef SPI_CLK_LOW_POWER 1101 #ifdef SPI_CLK_LOW_POWER
1117 SPI_CLK_DISABLE 1102 SPI_CLK_DISABLE
1118 #endif 1103 #endif
1104
1105 #if ((ABB_SEMAPHORE_PROTECTION == 1) || (ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1106 // release the semaphore only if it has correctly been created.
1107 if(sem_status == NU_SUCCESS)
1108 {
1109 NU_Release_Semaphore(&abb_sem);
1110 }
1111 #endif // ABB_SEMAPHORE_PROTECTION
1119 } 1112 }
1120 1113
1121 1114
1122 /*-----------------------------------------------------------------------*/ 1115 /*-----------------------------------------------------------------------*/
1123 /* ABB_Write_Uplink_Data() */ 1116 /* ABB_Write_Uplink_Data() */
1124 /* */ 1117 /* */
1125 /* This function uses the SPI to write to ABB uplink buffer. */ 1118 /* This function uses the SPI to write to ABB uplink buffer. */
1126 /* */ 1119 /* */
1127 /*-----------------------------------------------------------------------*/ 1120 /*-----------------------------------------------------------------------*/
1128 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data) 1121 void ABB_Write_Uplink_Data(SYS_UWORD16 *TM_ul_data)
1129 { 1122 {
1130 SYS_UWORD8 i; 1123 SYS_UWORD8 i;
1131 volatile SYS_UWORD16 status; 1124 volatile SYS_UWORD16 status;
1132 1125 STATUS sem_status;
1133 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags. 1126
1127 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1128
1129 // check if the semaphore has been correctly created and try to obtain it.
1130 // if the semaphore cannot be obtained, the task is suspended and then resumed
1131 // as soon as the semaphore is released.
1132
1133 sem_status = NU_Obtain_Semaphore(&abb_sem, NU_SUSPEND);
1134
1135 #endif // ABB_SEMAPHORE_PROTECTION
1136
1137 // Start spi clock, mask IT for WR and read SPI_REG_STATUS to reset the RE and WE flags.
1134 SPI_Ready_for_WR 1138 SPI_Ready_for_WR
1135 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS; 1139 status = * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
1136 1140
1137 // Select Page 0 for TOGBR2 1141 // Select Page 0 for TOGBR2
1138 ABB_SetPage(PAGE0); 1142 ABB_SetPage(PAGE0);
1139 1143
1140 // Initialize pointer of burst buffer 1 : IBUFPTR is bit 10 of TOGBR2 1144 // Initialize pointer of burst buffer 1 : IBUFPTR is bit 10 of TOGBR2
1141 ABB_WriteRegister(TOGBR2, 0x10); 1145 ABB_WriteRegister(TOGBR2, 0x10);
1142 1146
1143 // Clear, assuming that it works like IBUFPTR of Vega 1147 // Clear, assuming that it works like IBUFPTR of Vega
1144 ABB_WriteRegister(TOGBR2, 0x0); 1148 ABB_WriteRegister(TOGBR2, 0x0);
1145 1149
1146 // Write the ramp data 1150 // Write the ramp data
1147 for (i=0;i<16;i++) 1151 for (i=0;i<16;i++)
1148 ABB_WriteRegister(BULDATA1_2, TM_ul_data[i]>>6); 1152 ABB_WriteRegister(BULDATA1_2, TM_ul_data[i]>>6);
1149 1153
1150 // Stop the SPI clock 1154 // Stop the SPI clock
1151 #ifdef SPI_CLK_LOW_POWER 1155 #ifdef SPI_CLK_LOW_POWER
1152 SPI_CLK_DISABLE 1156 SPI_CLK_DISABLE
1153 #endif 1157 #endif
1158
1159 #if ((ABB_SEMAPHORE_PROTECTION == 2) || (ABB_SEMAPHORE_PROTECTION == 3))
1160 // release the semaphore only if it has correctly been created.
1161 if(sem_status == NU_SUCCESS)
1162 {
1163 NU_Release_Semaphore(&abb_sem);
1164 }
1165 #endif // ABB_SEMAPHORE_PROTECTION
1154 } 1166 }
1155 1167
1156 //////////////////////// IDEV-INLO integration of sleep mode for Syren /////////////////////////////////////// 1168 //////////////////////// IDEV-INLO integration of sleep mode for Syren ///////////////////////////////////////
1157 1169
1158 #if (ANLG_FAM == 3) 1170 #if (ANLG_FAM == 3)
1163 volatile SYS_UWORD16 status,sl_ldo_stat; 1175 volatile SYS_UWORD16 status,sl_ldo_stat;
1164 1176
1165 ABB_SetPage(PAGE1); // Initialize transmit register. This transmission 1177 ABB_SetPage(PAGE1); // Initialize transmit register. This transmission
1166 // change the register page in ABB for usp to pg1 1178 // change the register page in ABB for usp to pg1
1167 1179
1168 ABB_WriteRegister(VRPCCFG, sleep_delay); // write delay value 1180 ABB_WriteRegister(VRPCCFG, sleep_delay); // write delay value
1169 1181
1170 sl_ldo_stat = ((sleep_type<<9|bg_select<<8) & 0x0374); 1182 sl_ldo_stat = ((sleep_type<<9|bg_select<<8) & 0x0374);
1171 1183
1172 ABB_WriteRegister(VRPCMSKSLP, sl_ldo_stat); // write sleep ldo configuration 1184 ABB_WriteRegister(VRPCMSKSLP, sl_ldo_stat); // write sleep ldo configuration
1173 1185
1174 ABB_SetPage(PAGE0); // Initialize transmit register. This transmission 1186 ABB_SetPage(PAGE0); // Initialize transmit register. This transmission
1175 // change the register page in ABB for usp to pg0 1187 // change the register page in ABB for usp to pg0
1176 } 1188 }
1177 #endif 1189 #endif
1181 /*-----------------------------------------------------------------------*/ 1193 /*-----------------------------------------------------------------------*/
1182 /* ABB_Power_Off() */ 1194 /* ABB_Power_Off() */
1183 /* */ 1195 /* */
1184 /* This function uses the SPI to switch off the ABB. */ 1196 /* This function uses the SPI to switch off the ABB. */
1185 /* */ 1197 /* */
1186 /*-----------------------------------------------------------------------*/ 1198 /*-----------------------------------------------------------------------*/
1187 void ABB_Power_Off(void) 1199 void ABB_Power_Off(void)
1188 { 1200 {
1189 // Wait until all necessary actions are performed (write in FFS, etc...) to power-off the board (empirical value - 30 ticks). 1201 // Wait until all necessary actions are performed (write in FFS, etc...) to power-off the board (empirical value - 30 ticks).
1190 NU_Sleep (30); 1202 NU_Sleep (30);
1191 1203
1192 // Wait also until <ON/OFF> key is released. 1204 // Wait also until <ON/OFF> key is released.
1193 // This is needed to avoid, if the power key is pressed for a long time, to switch 1205 // This is needed to avoid, if the power key is pressed for a long time, to switch
1194 // ON-switch OFF the mobile, until the power key is released. 1206 // ON-switch OFF the mobile, until the power key is released.
1195 #if((ANLG_FAM == 1) || (ANLG_FAM == 2)) 1207 #if((ANLG_FAM == 1) || (ANLG_FAM == 2))
1196 while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) { 1208 while ((ABB_Read_Status() & ONREFLT) == PWR_OFF_KEY_PRESSED) {
1197 #elif(ANLG_FAM == 3) 1209 #elif(ANLG_FAM == 3)
1198 while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) { 1210 while ((ABB_Read_Register_on_page(PAGE1, VRPCCFG) & PWOND) == PWR_OFF_KEY_PRESSED) {
1199 #endif 1211 #endif
1200 1212
1201 NU_Sleep (1); } 1213 NU_Sleep (1); }
1202 1214
1203 BZ_KeyBeep_OFF(); 1215 BZ_KeyBeep_OFF();
1204 1216
1205 #if(ANLG_FAM == 1) 1217 #if(ANLG_FAM == 1)
1206 ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE); 1218 ABB_Write_Register_on_page(PAGE0, VRPCCTL2, 0x00EE);
1207 #elif((ANLG_FAM == 2) || (ANLG_FAM == 3)) 1219 #elif((ANLG_FAM == 2) || (ANLG_FAM == 3))
1208 ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001); 1220 ABB_Write_Register_on_page(PAGE0, VRPCDEV, 0x0001);
1209 #endif 1221 #endif
1210 } 1222 }
1211 #endif 1223 #endif
1212
1213
1214