FreeCalypso > hg > fc-selenite
view src/cs/drivers/drv_app/r2d/lcds/luna/r2d_task_init_i.c @ 194:a18bf8df5fab
aci_pei.c: sync with Magnetite for (MMI != 0)
There was a change in Magnetite aci3 for (MMI != 0) configuration;
this config does not exist in Selenite, but this change is being
pulled in as a sync in order to keep the diff between Magnetite
and Selenite to a minimum.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 23 May 2020 07:21:43 +0000 |
parents | 6a53de2c4fc2 |
children |
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#include "r2d/lcds/luna/r2d_luna_lcd.h" #define R2D_MB_PRIM_SIZE (4000) static void r2d_refresh_task_init(void) { /* reset pulse */ CNTL_RST_REG |= EXT_RESET; rvf_delay(RVF_MS_TO_TICKS(10)); CNTL_RST_REG &= ~EXT_RESET; /* finish the job in the running R2D refresh task */ } void r2d_refresh_task_secondary_init(void) { UINT32 i; rvf_delay(RVF_MS_TO_TICKS(50)); /* start register init */ LCD_REG_WR(0x0001, 0x011c); // set SS and NL bit LCD_REG_WR(0x0002, 0x0100); // set 1 line inversion LCD_REG_WR(0x0003, 0x1030); // set GRAM write direction and BGR=1. LCD_REG_WR(0x0008, 0x0808); // set BP and FP LCD_REG_WR(0x000F, 0x0901); // Set frame rate rvf_delay(RVF_MS_TO_TICKS(10)); LCD_REG_WR(0x0010, 0x0000); // Set SAP,DSTB,STB LCD_REG_WR(0x0011, 0x1B41); // Set APON,PON,AON,VCI1EN,VC rvf_delay(RVF_MS_TO_TICKS(50)); LCD_REG_WR(0x0012, 0x200E); // Internal reference voltage= Vci; LCD_REG_WR(0x0013, 0x0052); // Set GVDD LCD_REG_WR(0x0014, 0x4B5C); // Set VCOMH/VCOML voltage //------------- Set GRAM area ------------------// LCD_REG_WR(0x0030, 0x0000); LCD_REG_WR(0x0031, 0x00DB); LCD_REG_WR(0x0032, 0x0000); LCD_REG_WR(0x0033, 0x0000); LCD_REG_WR(0x0034, 0x00DB); LCD_REG_WR(0x0035, 0x0000); LCD_REG_WR(0x0036, 0x00AF); LCD_REG_WR(0x0037, 0x0000); LCD_REG_WR(0x0038, 0x00DB); LCD_REG_WR(0x0039, 0x0000); // ----------- Adjust the Gamma Curve ----------// LCD_REG_WR(0x0050, 0x0000); LCD_REG_WR(0x0051, 0x0705); LCD_REG_WR(0x0052, 0x0C0A); LCD_REG_WR(0x0053, 0x0401); LCD_REG_WR(0x0054, 0x040C); LCD_REG_WR(0x0055, 0x0608); LCD_REG_WR(0x0056, 0x0000); LCD_REG_WR(0x0057, 0x0104); LCD_REG_WR(0x0058, 0x0E06); LCD_REG_WR(0x0059, 0x060E); rvf_delay(RVF_MS_TO_TICKS(50)); LCD_REG_WR(0x0007, 0x1017); /* initial hw framebuffer clearing */ LCD_REG_WR(0x20, 0); LCD_REG_WR(0x21, 0); LCD_IR = 0x22; for (i = 0; i < 176*220; i++) LCD_DR = 0xFFFF; /* white color */ } static void r2d_refresh_task_kill(void) { } static void r2d_dithering_init(void) { R2D_MALLOC(r2d_mb_id,UINT32,sizeof(UINT32)*4,r2d_g_dithering_matrix); if (r2d_g_dithering_matrix!=NULL) { r2d_g_dithering_matrix[0]=0; r2d_g_dithering_matrix[1]=2; r2d_g_dithering_matrix[2]=3; r2d_g_dithering_matrix[3]=1; } }