changeset 117:e67bbb9b1fb9

src/cs sync with Magnetite: C155 support
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 07 Nov 2018 06:03:02 +0000
parents 258bfecc22b1
children 225e39652387
files src/cs/drivers/drv_app/ffs/board/dev.c src/cs/drivers/drv_core/armio/armio.c src/cs/system/template/gsm_ds_motc155.template
diffstat 3 files changed, 234 insertions(+), 15 deletions(-) [+]
line wrap: on
line diff
--- a/src/cs/drivers/drv_app/ffs/board/dev.c	Wed Nov 07 05:42:51 2018 +0000
+++ b/src/cs/drivers/drv_app/ffs/board/dev.c	Wed Nov 07 06:03:02 2018 +0000
@@ -403,6 +403,11 @@
     { &flash_16x64[0], (char *) 0x700000, MANUFACT_INTEL,   0x88CD,
       FFS_DRIVER_INTEL_SB, 13 },
 
+    // Intel 28F640W30-B, 64Mb. (DSample). Using top-most 15x64kB sectors
+    // Changed for C155 aftermarket FFS config: 64x13 at 0x700000
+    { &flash_16x64[0], (char *) 0x700000, MANUFACT_INTEL,   0x8855,
+      FFS_DRIVER_INTEL, 13 },
+
 #else
 
     /* original table from TI/Openmoko, used on TI and Openmoko targets */
--- a/src/cs/drivers/drv_core/armio/armio.c	Wed Nov 07 05:42:51 2018 +0000
+++ b/src/cs/drivers/drv_core/armio/armio.c	Wed Nov 07 06:03:02 2018 +0000
@@ -207,20 +207,44 @@
   // set IOs 8,9,10,11,12 and 13 as high
   // set IOs 0 to 7 as low
 
-  #if defined(CONFIG_TARGET_C139) || defined(CONFIG_TARGET_C11X)
+  #ifdef CONFIG_TARGET_C11X
+    /* C11x GPIO configuration mimics what the original fw sets */
+
+    /* GPIO out all zeros */
+    *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
+
+    /* setting of GPIOs as outputs: register setting from the original fw */
+    *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2209;
+
+  #elif defined(CONFIG_TARGET_C139)
     /* C139 GPIO configuration mimics what the original fw sets */
 
     /* GPIO out all zeros - the LCD backlight is OFF */
     *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
 
-    /* setting of GPIOs as outputs also mimics what the original fw sets */
+    /* setting of GPIOs as outputs: register setting from the original fw */
     *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A09;
-  #elif defined(CONFIG_TARGET_PIRELLI)
+
+  #elif defined(CONFIG_TARGET_C155)
+    /* C155 GPIO config based on the available schematics */
+
+    /* GPIO out all zeros - the LCD backlight is OFF */
     *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
 
-    AI_ConfigBitAsOutput(1);	
+    AI_ConfigBitAsOutput(1);	/* LCD backlight control */
+    AI_ConfigBitAsOutput(2);	/* headset jack switch */
+    AI_ConfigBitAsOutput(3);	/* LCDA0 (?) */
+    AI_ConfigBitAsOutput(8);	/* MUSIC_A0 */
+    AI_ConfigBitAsOutput(12);	/* MUSIC_ON */
+
+  #elif defined(CONFIG_TARGET_PIRELLI)
+
+    *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000;
+
+    AI_ConfigBitAsOutput(1);
     AI_ConfigBitAsOutput(4);
     AI_ConfigBitAsOutput(7);
+
   #else	/* classic TI/Openmoko/FreeCalypso targets */
     // set IOs 1 and 8 to 13 as high
     // set IOs 0 and 2 to 7 as low
@@ -236,24 +260,26 @@
 
     // ARMIO_CNTL_REG register configuration :
     // set IOs 1,2,5,7,9,14 and 15 as ouputs.
-    #ifndef CONFIG_TARGET_DSAMPLE
-      AI_ConfigBitAsOutput(0);	/* FreeCalypso addition */
+    // bits conditionalized on CONFIG_TARGET_GTAMODEM or CONFIG_TARGET_FCDEV3B
+    // are FreeCalypso additions
+    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
+      AI_ConfigBitAsOutput(0);
     #endif
-    AI_ConfigBitAsOutput(1);	
+    AI_ConfigBitAsOutput(1);
     AI_ConfigBitAsOutput(2);
     #ifdef CONFIG_TARGET_GTAMODEM
       AI_ConfigBitAsOutput(3);
     #endif
-    #ifndef CONFIG_TARGET_DSAMPLE
-      AI_ConfigBitAsOutput(4);	/* FreeCalypso addition */
+    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
+      AI_ConfigBitAsOutput(4);
     #endif
     AI_ConfigBitAsOutput(5);
-    #ifndef CONFIG_TARGET_DSAMPLE
-      AI_ConfigBitAsOutput(6);	/* FreeCalypso addition */
+    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
+      AI_ConfigBitAsOutput(6);
     #endif
     AI_ConfigBitAsOutput(7);
-    #ifndef CONFIG_TARGET_DSAMPLE
-      AI_ConfigBitAsOutput(8);	/* FreeCalypso addition */
+    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
+      AI_ConfigBitAsOutput(8);
     #endif
     AI_ConfigBitAsOutput(9);
     #ifdef CONFIG_TARGET_GTAMODEM
@@ -261,8 +287,8 @@
       AI_ConfigBitAsOutput(11);
       AI_ConfigBitAsOutput(12);
     #endif
-    #ifndef CONFIG_TARGET_DSAMPLE
-      AI_ConfigBitAsOutput(13);	/* FreeCalypso addition */
+    #if defined(CONFIG_TARGET_GTAMODEM) || defined(CONFIG_TARGET_FCDEV3B)
+      AI_ConfigBitAsOutput(13);
     #endif
     AI_ConfigBitAsOutput(14);
     AI_ConfigBitAsOutput(15);
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/src/cs/system/template/gsm_ds_motc155.template	Wed Nov 07 06:03:02 2018 +0000
@@ -0,0 +1,188 @@
+/*
+ * Integrated Protocol Stack Linker command file (all components)
+ *
+ * Target : ARM
+ *
+ * Copyright (c) Texas Instruments 2002, Condat 2002
+ *
+ * This version of the linker script template has been concocted
+ * by Spacefalcon the Outlaw based on previous hacks.
+ */
+
+-c /* Autoinitialize variables at runtime */
+
+/*********************************/
+/* SPECIFY THE SYSTEM MEMORY MAP */
+/*********************************/
+
+MEMORY
+{
+  /* CS0: Flash 4 Mbytes ****************************************************/
+  /* Interrupt Vectors Table */
+  I_MEM   (RXI) : org = 0x00000000   len = 0x00000100
+
+  /* Boot Sector */
+  B_MEM   (RXI) : org = 0x00000100   len = 0x00001f00
+
+  /* Magic Word for Calypso Boot ROM */
+  MWC_MEM (RXI)  : org = 0x00002000   len = 0x00000004  fill = 0x0000001
+
+  /* Program Memory */
+  P_MEM1  (RXI) : org = 0x000200E0   len = 0x00000700
+  P_MEM2  (RXI) : org = 0x000207E0   len = 0x00000004
+  P_MEM3  (RXI) : org = 0x000207E4   len = 0x00400000
+
+  /* FFS Area */
+  FFS_MEM (RX)  : org = 0x00700000   len = 0x000D0000
+  /**************************************************************************/
+
+  /* CS1: External SRAM 2 Mbytes ********************************************/
+  /* Data Memory */
+
+  /* We do the same splitting hack as on other targets */
+
+  D_MEM1  (RW)  : org = 0x01000000   len = 0x00100000
+  D_MEM2  (RW)  : org = 0x01100000   len = 0x00100000
+  /**************************************************************************/
+
+  /* CS6: Calypso Internal SRAM 256 kbytes **********************************/
+  /* Code & Variables Memory */
+  S_MEM   (RXW) : org = 0x00800000   len = 0x00040000
+  /**************************************************************************/
+}
+
+/***********************************************/
+/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
+/***********************************************/
+
+/*
+ * Since the bootloader directly calls the INT_Initialize() routine located
+ * in int.s, this int.s code must always be mapped at the same address
+ * (usually in the second flash sector). Its length is about 0x500 bytes.
+ * Then comes the code that need to be loaded into the internal RAM.
+ */
+
+SECTIONS
+{
+    .intvecs : {} > I_MEM      /* Interrupt Vectors Table */
+    .monitor : > B_MEM         /* Monitor Constants & Code */
+    {
+        $(CONST_BOOT_LIB)
+    }
+
+    .inttext : {} > P_MEM1     /* int.s Code */
+
+    .bss_dar : > D_MEM1        /* DAR SWE Variables */
+    {
+        $(BSS_DAR_LIB)
+    }
+
+    /*
+     * The .bss section should not be split to ensure it is initialized to 0
+     * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
+     * or in D_MEM2.
+     *
+     * Falcon's note for K5A3281: see the comments above where the memory
+     * regions are defined.
+     */
+
+    .bss     : > D_MEM1 | D_MEM2        /* Global & Static Variables */
+    {
+        $(BSS_BOOT_LIB)
+    }
+
+    /*
+     * All .bss sections, which must be mapped in internal RAM must be
+     * grouped in order to initialized the corresponding memory to 0.
+     * This initialization is done in int.s file before calling the Nucleus
+     * routine.
+     */
+
+    GROUP
+    {
+      S_D_Mem /* Label of start address of .bss section in Int. RAM */
+      .DintMem
+      {
+
+        /*
+         * .bss sections of the application
+         */
+
+        $(BSS_LIBS)
+
+      }
+
+      API_HISR_stack : {}
+ 
+      E_D_Mem /* Label of end address of .bss section in Int. RAM */
+    } > S_MEM
+
+    /*
+     * .text and .const sections which must be mapped in internal RAM.
+     */
+
+    .ldfl    : {} > P_MEM2 /* Used to know the start load address */
+    GROUP load = P_MEM3, run = S_MEM
+    {
+      S_P_Mem  /* Label of start address of .text & .const sections in Int. RAM */
+      .PIntMem
+      {
+        /*
+         * .text and .const sections of the application.
+         *
+         * The .veneer sections correspond exactly to .text:v&n sections
+         * implementing the veneer functions. The .text:v$n -> .veneer
+         * translation is performed by PTOOL software when PTOOL_OPTIONS
+         * environement variable is set to veneer_section.
+         */
+
+        $(CONST_LIBS)
+
+      }
+      E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
+    }
+
+    /*
+     * The rest of the code is mapped in flash, however the trampolines
+     * load address should be consistent with .text.
+     */
+    COMMENT2START      
+    `trampolines load = P_MEM3, run = S_MEM
+    COMMENT2END
+
+    .text    : {} > P_MEM3            /* Code */
+
+    /*
+     * The rest of the constants is mapped in flash.
+     * The .cinit section should not be split.
+     */
+
+    .cinit   : {} >  P_MEM3           /* Initialization Tables */
+    .const   : {} >  P_MEM3           /* Constant Data */
+    KadaAPI  : {} >  P_MEM3           /* ROMized CLDC */
+
+    .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */
+
+    .stackandheap : > D_MEM1   /* System Stacks, etc... */
+    {
+      /* Leave 20 32bit words for register pushes. */
+      . = align(8);
+      . += 20 * 4;
+
+      /* Stack for abort and/or undefined modes. */
+      exception_stack = .;
+
+      /* Leave 38 32bit words for state saving on exceptions. */
+      _xdump_buffer = .;
+      . += 38 * 4;
+      . = align(8);
+
+      /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
+      stack_segment = .;
+      . += 0xB00;
+    }
+
+    .data    : {} > D_MEM1     /* Initialized Data */
+    .sysmem  : {} > D_MEM1     /* Dynamic Memory Allocation Area */
+
+}