log

age author description
2018-07-21 Mychaela Falconia configure-gcc.sh: created
2018-07-21 Mychaela Falconia components/main_ir: ramvecs module now goes outside of libs
2018-07-21 Mychaela Falconia gcc/makefile-body: created
2018-07-20 Mychaela Falconia .../main/gcc/bootentry.S: the literal pool needs to be arranged
2018-07-20 Mychaela Falconia src/cs/system/main/gcc/bootentry.S: written
2018-07-20 Mychaela Falconia scripts/test-setup-tms470.sh: updated
2018-07-20 Mychaela Falconia components/libsys_{fl,ir}: created
2018-07-20 Mychaela Falconia src/libsys: pieced together from Citrine
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