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annotate sw/Makefile @ 25:c03a882cc49e

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doc/Sniffer-FPGA-design: update for working status
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Aug 2023 06:37:58 +0000
parents abb72a74f27a
children 28ffdfa193f3
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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abb72a74f27a sw/Makefile: add
Mychaela Falconia <falcon@freecalypso.org>
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1 CC= gcc
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2 CFLAGS= -O2
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Mychaela Falconia <falcon@freecalypso.org>
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3 PROGDIR=sniff-rx
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4 LIBDIR= libserial
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5 SUBDIR= ${PROGDIR} ${LIBDIR}
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7 all: ${SUBDIR}
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9 sniff-rx: libserial
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11 ${SUBDIR}: FRC
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12 cd $@; ${MAKE} ${MFLAGS} CC=${CC} CFLAGS="${CFLAGS}"
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14 clean: FRC
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15 rm -f a.out core errs
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16 for i in ${SUBDIR}; do (cd $$i; ${MAKE} ${MFLAGS} clean); done
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17
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18 FRC: