annotate fpga/sniffer-pps/spenh_ctrl.v @ 50:f8c27c2bde0e

README: project rename
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 21 Sep 2023 07:01:49 +0000
parents ab37fcb71744
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
31
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 /*
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 * This module implements speed enhancement control based on signals
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 * from the PPS catcher block.
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4 */
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 module spenh_ctrl (IntClk, SIM_RST_sync, Rx_strobe, Rx_char,
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7 pos_PPS_resp_PPS1, pos_PPS_resp_PCK,
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 speed_enh_mode, speed_enh_mult);
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10 input IntClk;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
11 input SIM_RST_sync;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
12 input Rx_strobe;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13 input [7:0] Rx_char;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 input pos_PPS_resp_PPS1, pos_PPS_resp_PCK;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 output reg speed_enh_mode;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17 output reg [1:0] speed_enh_mult;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
18
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
19 always @(posedge IntClk)
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20 if (!SIM_RST_sync)
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 speed_enh_mode <= 1'b0;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22 else if (Rx_strobe && pos_PPS_resp_PCK)
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 speed_enh_mode <= 1'b1;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 always @(posedge IntClk)
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26 if (Rx_strobe && pos_PPS_resp_PPS1)
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
27 speed_enh_mult <= Rx_char[1:0];
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
28
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
29 endmodule