FreeCalypso > hg > fc-sim-sniff

annotate fpga/sniffer-pps/top.v @ 32:fb9c03515832

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
sw/sniff-rx/Makefile: add install
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 29 Aug 2023 21:44:22 +0000
parents ab37fcb71744
children 737579209153
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 module top (CLK12, LED1, LED2, LED3, LED4, LED5, UART_TxD, UART_RxD, UART_RTS,
26
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
2 UART_CTS, UART_DTR, UART_DSR, UART_DCD, SIM_RST_in, SIM_CLK_in,
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
3 SIM_IO_in, SIM_IO_out);
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
4
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
5 input CLK12;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
6 output LED1, LED2, LED3, LED4, LED5;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
7
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
8 input UART_TxD, UART_RTS, UART_DTR;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
9 output UART_RxD, UART_CTS, UART_DSR, UART_DCD;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
10
26
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
11 input SIM_RST_in, SIM_CLK_in, SIM_IO_in;
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
12 output SIM_IO_out;
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
13
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
14 /* input synchronizers */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
15
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
16 wire SIM_RST_sync, SIM_CLK_sync, SIM_IO_sync;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
17
26
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
18 sync_inputs sync (CLK12, SIM_RST_in, SIM_RST_sync, SIM_CLK_in, SIM_CLK_sync,
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
19 SIM_IO_in, SIM_IO_sync);
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
20
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
21 /* character receiver */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
22
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
23 wire Rx_strobe, Rx_error;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
24 wire [7:0] Rx_char;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
25 wire Rx_start_bit, Rx_parity_bit;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
26
31
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
27 wire speed_enh_mode;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
28 wire [1:0] speed_enh_mult;
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
29
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
30 sniff_rx sniff_rx (CLK12, SIM_RST_sync, SIM_CLK_sync, SIM_IO_sync,
31
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
31 Rx_strobe, Rx_error, Rx_char, Rx_start_bit, Rx_parity_bit,
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
32 speed_enh_mode, speed_enh_mult);
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
33
28
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
34 /* PPS catcher */
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
35
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
36 wire pos_PPS_resp_PPS1, pos_PPS_resp_PCK;
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
37
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
38 pps_catcher pps (CLK12, SIM_RST_sync, Rx_strobe, Rx_char,
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
39 pos_PPS_resp_PPS1, pos_PPS_resp_PCK);
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
40
31
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
41 spenh_ctrl spenh (CLK12, SIM_RST_sync, Rx_strobe, Rx_char,
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
42 pos_PPS_resp_PPS1, pos_PPS_resp_PCK,
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
43 speed_enh_mode, speed_enh_mult);
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
44
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
45 /* explicit detection of RST transitions */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
46
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
47 wire SIM_RST_toggle;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
48
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
49 reset_detect reset_detect (CLK12, SIM_RST_sync, SIM_RST_toggle);
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
50
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
51 /* output to the host */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
52
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
53 wire Tx_trigger;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
54 wire [15:0] Tx_data;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
55
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
56 assign Tx_trigger = Rx_strobe | SIM_RST_toggle;
31
ab37fcb71744 fpga/sniffer-pps: add actual F/D control
Mychaela Falconia <falcon@freecalypso.org>
parents: 30
diff changeset
57 assign Tx_data = {SIM_RST_toggle,SIM_RST_sync,speed_enh_mode,
28
0f74428c177c fpga/sniffer-pps: first version
Mychaela Falconia <falcon@freecalypso.org>
parents: 26
diff changeset
58 pos_PPS_resp_PCK,pos_PPS_resp_PPS1,
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
59 Rx_error,Rx_start_bit,Rx_parity_bit,Rx_char};
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
60
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
61 uart_tx uart_tx (CLK12, Tx_trigger, Tx_data, UART_RxD);
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
62
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
63 /* UART modem control outputs: unused */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
64
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
65 assign UART_CTS = 1'b1;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
66 assign UART_DSR = 1'b0;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
67 assign UART_DCD = 1'b0;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
68
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
69 /* board LEDs */
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
70
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
71 assign LED1 = 1'b1;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
72 assign LED2 = 1'b0;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
73 assign LED3 = 1'b1;
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
74 assign LED4 = 1'b0;
30
dc99c9962aed fpga/sniffer-*: forgot to change SIM_RST to SIM_RST_in for LED5
Mychaela Falconia <falcon@freecalypso.org>
parents: 28
diff changeset
75 assign LED5 = SIM_RST_in;
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
76
26
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
77 /* SIM_IO_out dummy: if someone mistakenly connects an Icestick board with
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
78 * this FPGA image in it to a cardem pod instead of the sniffing one,
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
79 * we ensure that the 74LVC1G07 OD buffer remains off by feeding logic HIGH
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
80 * to this buffer.
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
81 */
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
82
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
83 assign SIM_IO_out = 1'b1;
e5c5162b3a8c fpga/sniffer-basic: drive pin 115 high for cardem pod
Mychaela Falconia <falcon@freecalypso.org>
parents: 11
diff changeset
84
6
7db5fd6646df fpga/sniffer-basic: initial version
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
85 endmodule