FreeCalypso > hg > fc-sim-sniff
comparison boards/mv-sniffer/src/MCL @ 9:10c779b8753e
FPGA Makefile: capture yosys stdout
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 21 Aug 2023 01:00:16 +0000 |
parents | 0c321f1ce085 |
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8:7cab8e0dd937 | 9:10c779b8753e |
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