FreeCalypso > hg > fc-sim-sniff
comparison boards/mv-sniffer/src/schem.v @ 1:55e5f926fb5a
beginning of mv-sniffer adapter board design
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Fri, 28 Jul 2023 20:01:06 +0000 |
| parents | |
| children |
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| 0:fbbafa93b52b | 1:55e5f926fb5a |
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| 1 module board (); | |
| 2 | |
| 3 wire GND; | |
| 4 wire SIM_VCC, SIM_RST, SIM_CLK, SIM_IO; | |
| 5 wire FPGA_VCC, FPGA_RST, FPGA_CLK, FPGA_IO; | |
| 6 | |
| 7 /* headers connecting to other boards */ | |
| 8 | |
| 9 header_6pin hdr_sim (.pin_1(SIM_VCC), | |
| 10 .pin_2(SIM_RST), | |
| 11 .pin_3(SIM_CLK), | |
| 12 .pin_4(SIM_IO), | |
| 13 .pin_5(GND), | |
| 14 .pin_6(GND) | |
| 15 ); | |
| 16 | |
| 17 header_6pin hdr_fpga (.pin_1(FPGA_VCC), | |
| 18 .pin_2(GND), | |
| 19 .pin_3(FPGA_RST), | |
| 20 .pin_4(FPGA_CLK), | |
| 21 .pin_5(FPGA_IO), | |
| 22 .pin_6() /* unused */ | |
| 23 ); | |
| 24 | |
| 25 /* sniffing buffer IC */ | |
| 26 | |
| 27 ic_74LVC4T3144 buffer ( .GND(GND), | |
| 28 .VccA(SIM_VCC), | |
| 29 .VccB(FPGA_VCC), | |
| 30 .nOE(GND), | |
| 31 .A1(SIM_RST), | |
| 32 .A2(SIM_CLK), | |
| 33 .A3(SIM_IO), | |
| 34 .YA4(), /* no connect */ | |
| 35 .YB1(FPGA_RST), | |
| 36 .YB2(FPGA_CLK), | |
| 37 .YB3(FPGA_IO), | |
| 38 .B4(GND) | |
| 39 ); | |
| 40 | |
| 41 /* bypass caps next to buffer IC supply pins */ | |
| 42 | |
| 43 capacitor C1 (SIM_VCC, GND); | |
| 44 capacitor C2 (FPGA_VCC, GND); | |
| 45 | |
| 46 /* pull-down resistors on buffer IC outputs, for PPD mode */ | |
| 47 | |
| 48 resistor R1 (FPGA_RST, GND); | |
| 49 resistor R2 (FPGA_CLK, GND); | |
| 50 resistor R3 (FPGA_IO, GND); | |
| 51 | |
| 52 endmodule |