FreeCalypso > hg > fc-sim-sniff
comparison fpga/sniffer-basic/Makefile @ 52:cbfcc480d61b
fpga build: migrate to yosys-tee wrapper
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Tue, 03 Oct 2023 18:17:58 +0000 |
| parents | 990ecafdddb4 |
| children |
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| 51:8a3003860cf8 | 52:cbfcc480d61b |
|---|---|
| 3 PROJ= fpga | 3 PROJ= fpga |
| 4 | 4 |
| 5 all: ${PROJ}.bin timing.rpt | 5 all: ${PROJ}.bin timing.rpt |
| 6 | 6 |
| 7 ${PROJ}.json: ${VSRC} | 7 ${PROJ}.json: ${VSRC} |
| 8 ../tools/yosys-wrap top $@ ${VSRC} | tee synthesis.rpt | 8 ../tools/yosys-tee top $@ synthesis.rpt ${VSRC} |
| 9 | 9 |
| 10 ${PROJ}.asc: ${PROJ}.json ${PCF} | 10 ${PROJ}.asc: ${PROJ}.json ${PCF} |
| 11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \ | 11 nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \ |
| 12 --json ${PROJ}.json -l pnr.rpt | 12 --json ${PROJ}.json -l pnr.rpt |
| 13 | 13 |