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comparison fpga/sniffer-basic/sniff_rx.v @ 10:db8acc067542

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fpga/sniffer-basic/sniff_rx.v: typo in signal name
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 01:05:25 +0000
parents 7db5fd6646df
children
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equal deleted inserted replaced
9:10c779b8753e 10:db8acc067542
52 end 52 end
53 end 53 end
54 54
55 assign Rx_strobe = rx_active && SIM_CLK_edge && clk_count == 10'd0 && 55 assign Rx_strobe = rx_active && SIM_CLK_edge && clk_count == 10'd0 &&
56 bit_count == 4'd10; 56 bit_count == 4'd10;
57 assign Rx_error = Rx_strobe && !SIO_IO_sync; 57 assign Rx_error = Rx_strobe && !SIM_IO_sync;
58 assign Rx_char = shift_reg[8:1]; 58 assign Rx_char = shift_reg[8:1];
59 assign Rx_start_bit = shift_reg[0]; 59 assign Rx_start_bit = shift_reg[0];
60 assign Rx_parity_bit = shift_reg[9]; 60 assign Rx_parity_bit = shift_reg[9];
61 61
62 endmodule 62 endmodule