FreeCalypso > hg > fc-sim-sniff
comparison boards/sim-fpc-pasv/src/schem.v @ 0:fbbafa93b52b
starting project with README and sim-fpc-pasv adapter
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 17 Jul 2023 00:52:00 +0000 |
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children |
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-1:000000000000 | 0:fbbafa93b52b |
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1 module board (); | |
2 | |
3 wire GND, VCC, VPP, RST, CLK, IO; | |
4 | |
5 conn_6pin_plus2 fpc (.pin_1(VCC), | |
6 .pin_2(RST), | |
7 .pin_3(CLK), | |
8 .pin_4(IO), | |
9 .pin_5(VPP), | |
10 .pin_6(GND), | |
11 /* mounting pads */ | |
12 .pin_7(GND), | |
13 .pin_8(GND) | |
14 ); | |
15 | |
16 pkg_SIM_socket sim (.pin_1(VCC), | |
17 .pin_2(RST), | |
18 .pin_3(CLK), | |
19 .pin_4(), /* gap in footprint pin numbering */ | |
20 .pin_5(GND), | |
21 .pin_6(VPP), | |
22 .pin_7(IO), | |
23 .pin_8() /* gap in footprint pin numbering */ | |
24 ); | |
25 | |
26 capacitor C1 (VCC, GND); | |
27 | |
28 header_4pin tap_C1_C3 ( .pin_1(GND), | |
29 .pin_2(VCC), /* C1 */ | |
30 .pin_3(RST), /* C2 */ | |
31 .pin_4(CLK) /* C3 */ | |
32 ); | |
33 | |
34 header_4pin tap_C5_C7 ( .pin_1(GND), | |
35 .pin_2(GND), /* C5 */ | |
36 .pin_3(VPP), /* C6 */ | |
37 .pin_4(IO) /* C7 */ | |
38 ); | |
39 | |
40 endmodule |