FreeCalypso > hg > fc-sim-sniff
view fpga/common/icestick.pcf @ 48:1068f9fd41d5
doc: project rename
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 21 Sep 2023 06:31:34 +0000 |
parents | 990ecafdddb4 |
children |
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# Pin Constraint File for the HK1X FPGA as wired on the Icestick board, # adapted for SIMtrace-ice application. # Board essentials set_io CLK12 21 set_io LED1 99 set_io LED2 98 set_io LED3 97 set_io LED4 96 set_io LED5 95 # FT2232H UART channel, signal names are from FT2232H DTE perspective, # the logic in the FPGA has to act as DCE. set_io UART_TxD 9 set_io UART_RxD 8 set_io UART_RTS 7 set_io UART_CTS 4 set_io UART_DTR 3 set_io UART_DSR 2 set_io UART_DCD 1 # SIM sniffing interface, receiving outputs from the level shifter board # via J1 header pins, plus output line for OD buffer in cardem application. set_io SIM_RST_in 112 set_io SIM_CLK_in 113 set_io SIM_IO_in 114 set_io SIM_IO_out 115