FreeCalypso > hg > fc-sim-sniff
view fpga/sniffer-basic/Makefile @ 48:1068f9fd41d5
doc: project rename
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Thu, 21 Sep 2023 06:31:34 +0000 |
parents | 990ecafdddb4 |
children | cbfcc480d61b |
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VSRC= clk_edge.v reset_detect.v sniff_rx.v sync_inputs.v top.v uart_tx.v PCF= ../common/icestick.pcf PROJ= fpga all: ${PROJ}.bin timing.rpt ${PROJ}.json: ${VSRC} ../tools/yosys-wrap top $@ ${VSRC} | tee synthesis.rpt ${PROJ}.asc: ${PROJ}.json ${PCF} nextpnr-ice40 --hx1k --package tq144 --asc $@ --pcf ${PCF} \ --json ${PROJ}.json -l pnr.rpt ${PROJ}.bin: ${PROJ}.asc icepack $< $@ timing.rpt: ${PROJ}.asc icetime -d hx1k -mtr $@ $< clean: rm -f *.json *.asc *.bin *.rpt