view sw/sniff-rx/byteproc.c @ 51:8a3003860cf8

doc/Sniffing-hw-setup: wire assignments for mv-sniffer setup
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 24 Sep 2023 01:15:44 +0000
parents 43f678895a3a
children
line wrap: on
line source

/*
 * In this module we implement byte-level processing of the serial stream
 * coming from the sniffer FPGA.
 */

#include <sys/time.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

extern FILE *main_outf;
extern int logfile_flag;
extern struct timeval curtime;
extern struct tm *cur_tm;

static int byte_pending_flag, byte_pending_val;

static void
annotate(new_byte)
{
	if (new_byte & 0x80) {
		fprintf(main_outf, " RST %s", new_byte & 0x40 ? "high" : "low");
		return;
	}
	switch (new_byte & 0x18) {
	case 0x08:
		fputs(" PPS1", main_outf);
		return;
	case 0x10:
		fputs(" PPS spenh trigger", main_outf);
		return;
	case 0x18:
		fputs(" Bad PPS catcher bits!", main_outf);
		return;
	}
}

void
rx_byte_in(new_byte)
{
	if (!byte_pending_flag) {
		byte_pending_flag = 1;
		byte_pending_val = new_byte;
		return;
	}
	/* received complete 2-byte message from the FPGA */
	fprintf(main_outf, "[%02d:%02d:%02d.%06u] %02X%02X", cur_tm->tm_hour,
		cur_tm->tm_min, cur_tm->tm_sec, (unsigned) curtime.tv_usec,
		new_byte, byte_pending_val);
	annotate(new_byte);
	putc('\n', main_outf);
	byte_pending_flag = 0;
	if (logfile_flag && (new_byte & 0x80))
		printf("SIM RST is %s\n", new_byte & 0x40 ? "high" : "low");
}

void
flush_pending_byte()
{
	if (!byte_pending_flag)
		return;
	printf("BAD BAD BAD: loss of byte sync with FPGA source!\n");
	byte_pending_flag = 0;
}