FreeCalypso > hg > fc-sim-sniff
view boards/sim-fpc-pasv/src/MCL @ 18:af1a9732da1f
FPGA build: include yosys-wrap in this repository
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 21 Aug 2023 19:25:35 +0000 |
parents | fbbafa93b52b |
children |
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C1: hier=C1 value=100n footprint=0603 description=Ceramic chip capacitor, X7R, 0.1 uF, 0603 manufacturer=Samsung Electro-Mechanics manufacturer_part_number=CL10B104KB8NNWC vendor=Digi-Key vendor_part_number=1276-1935-1-ND npins=2 J1: hier=fpc manufacturer=Wurth Elektronik manufacturer_part_number=686106148922 description=FPC connector, 1 mm pitch, 6 pins, flip lock vendor=Digi-Key vendor_part_number=732-6017-1-ND footprint=WRFPC1_6_1L # pin 1 on the left npins=8 # 6 actual pins + 2 mounting pads J2: hier=sim manufacturer=C&K Components manufacturer_part_number=CCM03-3009LFT description=SIM socket, full size, with latch vendor=Digi-Key vendor_part_number=401-1720-1-ND footprint=file:SIM_Socket_TI npins=8 part header-4pin: footprint=JUMPER4 description=Header, 0.100", single row, 4 posts manufacturer=Molex manufacturer_part_number=0901200924 vendor=Digi-Key vendor_part_number=WM20580-ND npins=4 J3: hier=tap_C1_C3 part=header-4pin J4: hier=tap_C5_C7 part=header-4pin