view boards/sim-fpc-pasv/src/primitives @ 18:af1a9732da1f

FPGA build: include yosys-wrap in this repository
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 21 Aug 2023 19:25:35 +0000
parents fbbafa93b52b
children
line wrap: on
line source

capacitor	numpins 2;

header_4pin	numpins 4;
conn_6pin_plus2	numpins 8;
pkg_SIM_socket	numpins 8;