FreeCalypso > hg > fc-sim-sniff
view boards/sim-fpc-pasv/src/Makefile @ 25:c03a882cc49e
doc/Sniffer-FPGA-design: update for working status
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 29 Aug 2023 06:37:58 +0000 |
parents | fbbafa93b52b |
children |
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BOMS= tallied-bom.txt tallied-bom.csv comptab.txt NETS= sverp.unet bound.unet pcb-netlist.txt all: ${BOMS} ${NETS} elements.pcb sverp.unet: schem.v primitives ueda-sverp -o $@ schem.v bound.unet: MCL sverp.unet unet-bind -c sverp.unet $@ pcb-netlist.txt: bound.unet unet2pcb bound.unet $@ tallied-bom.txt: MCL ueda-mkbom -cr > $@ tallied-bom.csv: MCL ueda-csvbom > $@ comptab.txt: MCL ueda-shortbom > $@ elements.pcb: MCL ueda-getfps -ch | ueda-runm4 > $@ clean: rm -f *.unet *.txt *.csv errs elements.pcb