/*
 * The logic implemented in this module detects if SIM_CLK is running or not,
 * for the purpose of visual indication on a LED.
 */

module clk_check (IntClk, SIM_CLK_sync, SIM_CLK_running);

input IntClk;
input SIM_CLK_sync;
output SIM_CLK_running;

reg [11:0] shift_reg;

always @(posedge IntClk)
	shift_reg <= {shift_reg[10:0],SIM_CLK_sync};

assign SIM_CLK_running = (shift_reg != 12'h000) && (shift_reg != 12'hFFF);

endmodule